From: Antonio Borneo <antonio.borneo@foss.st.com> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, <linux-kernel@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org> Cc: Ludovic Barre <ludovic.barre@foss.st.com>, Loic Pallardy <loic.pallardy@foss.st.com>, Pascal Paillet <p.paillet@foss.st.com>, Antonio Borneo <antonio.borneo@foss.st.com> Subject: [PATCH 3/7] irqchip/stm32-exti: remove EMR register access for stm32mp15 Date: Tue, 10 May 2022 18:41:19 +0200 [thread overview] Message-ID: <20220510164123.557921-3-antonio.borneo@foss.st.com> (raw) In-Reply-To: <20220510164123.557921-1-antonio.borneo@foss.st.com> From: Alexandre Torgue <alexandre.torgue@foss.st.com> C1EMRx registers are not accessible on STM32MP15x. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> --- drivers/irqchip/irq-stm32-exti.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index 1145f064faa8..c8003f4f0457 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -132,7 +132,6 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = { static const struct stm32_exti_bank stm32mp1_exti_b1 = { .imr_ofst = 0x80, - .emr_ofst = 0x84, .rtsr_ofst = 0x00, .ftsr_ofst = 0x04, .swier_ofst = 0x08, @@ -142,7 +141,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { static const struct stm32_exti_bank stm32mp1_exti_b2 = { .imr_ofst = 0x90, - .emr_ofst = 0x94, .rtsr_ofst = 0x20, .ftsr_ofst = 0x24, .swier_ofst = 0x28, @@ -152,7 +150,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { static const struct stm32_exti_bank stm32mp1_exti_b3 = { .imr_ofst = 0xA0, - .emr_ofst = 0xA4, .rtsr_ofst = 0x40, .ftsr_ofst = 0x44, .swier_ofst = 0x48, @@ -792,7 +789,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, * clear registers to avoid residue */ writel_relaxed(0, base + stm32_bank->imr_ofst); - writel_relaxed(0, base + stm32_bank->emr_ofst); + if (stm32_bank->emr_ofst) + writel_relaxed(0, base + stm32_bank->emr_ofst); pr_info("%pOF: bank%d\n", node, bank_idx); -- 2.36.0
WARNING: multiple messages have this Message-ID (diff)
From: Antonio Borneo <antonio.borneo@foss.st.com> To: Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Maxime Coquelin <mcoquelin.stm32@gmail.com>, Alexandre Torgue <alexandre.torgue@foss.st.com>, <linux-kernel@vger.kernel.org>, <linux-stm32@st-md-mailman.stormreply.com>, <linux-arm-kernel@lists.infradead.org> Cc: Ludovic Barre <ludovic.barre@foss.st.com>, Loic Pallardy <loic.pallardy@foss.st.com>, Pascal Paillet <p.paillet@foss.st.com>, Antonio Borneo <antonio.borneo@foss.st.com> Subject: [PATCH 3/7] irqchip/stm32-exti: remove EMR register access for stm32mp15 Date: Tue, 10 May 2022 18:41:19 +0200 [thread overview] Message-ID: <20220510164123.557921-3-antonio.borneo@foss.st.com> (raw) In-Reply-To: <20220510164123.557921-1-antonio.borneo@foss.st.com> From: Alexandre Torgue <alexandre.torgue@foss.st.com> C1EMRx registers are not accessible on STM32MP15x. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> --- drivers/irqchip/irq-stm32-exti.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c index 1145f064faa8..c8003f4f0457 100644 --- a/drivers/irqchip/irq-stm32-exti.c +++ b/drivers/irqchip/irq-stm32-exti.c @@ -132,7 +132,6 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = { static const struct stm32_exti_bank stm32mp1_exti_b1 = { .imr_ofst = 0x80, - .emr_ofst = 0x84, .rtsr_ofst = 0x00, .ftsr_ofst = 0x04, .swier_ofst = 0x08, @@ -142,7 +141,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = { static const struct stm32_exti_bank stm32mp1_exti_b2 = { .imr_ofst = 0x90, - .emr_ofst = 0x94, .rtsr_ofst = 0x20, .ftsr_ofst = 0x24, .swier_ofst = 0x28, @@ -152,7 +150,6 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = { static const struct stm32_exti_bank stm32mp1_exti_b3 = { .imr_ofst = 0xA0, - .emr_ofst = 0xA4, .rtsr_ofst = 0x40, .ftsr_ofst = 0x44, .swier_ofst = 0x48, @@ -792,7 +789,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data, * clear registers to avoid residue */ writel_relaxed(0, base + stm32_bank->imr_ofst); - writel_relaxed(0, base + stm32_bank->emr_ofst); + if (stm32_bank->emr_ofst) + writel_relaxed(0, base + stm32_bank->emr_ofst); pr_info("%pOF: bank%d\n", node, bank_idx); -- 2.36.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-05-10 16:43 UTC|newest] Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-10 16:41 [PATCH 1/7] irqchip/stm32-exti: set_affinity return IRQ_SET_MASK_OK_DONE if no parent Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-10 16:41 ` [PATCH 2/7] irqchip/stm32-exti: manage IMR at each mask/unmask for direct event Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-11 8:04 ` Marc Zyngier 2022-05-11 8:04 ` Marc Zyngier 2022-05-10 16:41 ` Antonio Borneo [this message] 2022-05-10 16:41 ` [PATCH 3/7] irqchip/stm32-exti: remove EMR register access for stm32mp15 Antonio Borneo 2022-05-10 18:38 ` Marc Zyngier 2022-05-10 18:38 ` Marc Zyngier 2022-05-10 16:41 ` [PATCH 4/7] irqchip/stm32-exti: forward irq_request_resources to parent Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-10 18:44 ` Marc Zyngier 2022-05-10 18:44 ` Marc Zyngier 2022-05-11 14:55 ` Antonio Borneo 2022-05-11 14:55 ` Antonio Borneo 2022-05-12 10:04 ` Marc Zyngier 2022-05-10 16:41 ` [PATCH 5/7] irqchip/stm32-exti: prevent illegal read due to unbounded DT value Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-10 16:41 ` [PATCH 6/7] irqchip/stm32-exti: read event trigger type from event_trg register Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-10 16:41 ` [PATCH 7/7] irqchip/stm32-exti: simplify irq description table Antonio Borneo 2022-05-10 16:41 ` Antonio Borneo 2022-05-10 18:34 ` [PATCH 1/7] irqchip/stm32-exti: set_affinity return IRQ_SET_MASK_OK_DONE if no parent Marc Zyngier 2022-05-10 18:34 ` Marc Zyngier 2022-05-11 6:39 ` Antonio Borneo 2022-05-11 6:39 ` Antonio Borneo 2022-05-11 8:09 ` Marc Zyngier 2022-05-11 8:09 ` Marc Zyngier 2022-06-06 16:27 ` [PATCH v2 0/6] irqchip/stm32-exti: Fixes and simplifications Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-04 12:56 ` Antonio Borneo 2022-07-04 12:56 ` Antonio Borneo 2022-06-06 16:27 ` [PATCH v2 1/6] irqchip/stm32-exti: Fix irq_set_affinity return value Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Ludovic Barre 2022-06-06 16:27 ` [PATCH v2 2/6] irqchip/stm32-exti: Fix irq_mask/irq_unmask for direct events Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Loic Pallardy 2022-06-06 16:27 ` [PATCH v2 3/6] irqchip/stm32-exti: Prevent illegal read due to unbounded DT value Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo 2022-06-06 16:27 ` [PATCH v2 4/6] irqchip/stm32-exti: Tag emr register as undefined for stm32mp15 Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Alexandre Torgue 2022-06-06 16:27 ` [PATCH v2 5/6] irqchip/stm32-exti: Read event trigger type from event_trg register Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo 2022-06-06 16:27 ` [PATCH v2 6/6] irqchip/stm32-exti: Simplify irq description table Antonio Borneo 2022-06-06 16:27 ` Antonio Borneo 2022-07-07 8:15 ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo
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