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From: Antonio Borneo <antonio.borneo@foss.st.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>,
	Loic Pallardy <loic.pallardy@foss.st.com>,
	Pascal Paillet <p.paillet@foss.st.com>,
	Antonio Borneo <antonio.borneo@foss.st.com>
Subject: [PATCH v2 4/6] irqchip/stm32-exti: Tag emr register as undefined for stm32mp15
Date: Mon, 6 Jun 2022 18:27:55 +0200	[thread overview]
Message-ID: <20220606162757.415354-5-antonio.borneo@foss.st.com> (raw)
In-Reply-To: <20220510164123.557921-1-antonio.borneo@foss.st.com>

From: Alexandre Torgue <alexandre.torgue@foss.st.com>

The reference manual RM0436 of stm32mp15 till version v4.0 was
erroneously reporting the Event Mask Registers (EMR) for the
Cortex-A CPUs.
These registers have been removed from v5.0 of the manual and the
corresponding offsets have been marked as 'Reserved'.

Prevent accessing these reserved addresses by tagging the EMR
offsets as UNDEF_REG and modifying the code to handle this case.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
---
 drivers/irqchip/irq-stm32-exti.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index e2722e499ae5..e8fa91bda4ba 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -132,7 +132,7 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b1 = {
 	.imr_ofst	= 0x80,
-	.emr_ofst	= 0x84,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x00,
 	.ftsr_ofst	= 0x04,
 	.swier_ofst	= 0x08,
@@ -142,7 +142,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b2 = {
 	.imr_ofst	= 0x90,
-	.emr_ofst	= 0x94,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x20,
 	.ftsr_ofst	= 0x24,
 	.swier_ofst	= 0x28,
@@ -152,7 +152,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b3 = {
 	.imr_ofst	= 0xA0,
-	.emr_ofst	= 0xA4,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x40,
 	.ftsr_ofst	= 0x44,
 	.swier_ofst	= 0x48,
@@ -795,7 +795,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 	 * clear registers to avoid residue
 	 */
 	writel_relaxed(0, base + stm32_bank->imr_ofst);
-	writel_relaxed(0, base + stm32_bank->emr_ofst);
+	if (stm32_bank->emr_ofst != UNDEF_REG)
+		writel_relaxed(0, base + stm32_bank->emr_ofst);
 
 	pr_info("%pOF: bank%d\n", node, bank_idx);
 
-- 
2.36.1


WARNING: multiple messages have this Message-ID (diff)
From: Antonio Borneo <antonio.borneo@foss.st.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>,
	Loic Pallardy <loic.pallardy@foss.st.com>,
	Pascal Paillet <p.paillet@foss.st.com>,
	Antonio Borneo <antonio.borneo@foss.st.com>
Subject: [PATCH v2 4/6] irqchip/stm32-exti: Tag emr register as undefined for stm32mp15
Date: Mon, 6 Jun 2022 18:27:55 +0200	[thread overview]
Message-ID: <20220606162757.415354-5-antonio.borneo@foss.st.com> (raw)
In-Reply-To: <20220510164123.557921-1-antonio.borneo@foss.st.com>

From: Alexandre Torgue <alexandre.torgue@foss.st.com>

The reference manual RM0436 of stm32mp15 till version v4.0 was
erroneously reporting the Event Mask Registers (EMR) for the
Cortex-A CPUs.
These registers have been removed from v5.0 of the manual and the
corresponding offsets have been marked as 'Reserved'.

Prevent accessing these reserved addresses by tagging the EMR
offsets as UNDEF_REG and modifying the code to handle this case.

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
---
 drivers/irqchip/irq-stm32-exti.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/irqchip/irq-stm32-exti.c b/drivers/irqchip/irq-stm32-exti.c
index e2722e499ae5..e8fa91bda4ba 100644
--- a/drivers/irqchip/irq-stm32-exti.c
+++ b/drivers/irqchip/irq-stm32-exti.c
@@ -132,7 +132,7 @@ static const struct stm32_exti_drv_data stm32h7xx_drv_data = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b1 = {
 	.imr_ofst	= 0x80,
-	.emr_ofst	= 0x84,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x00,
 	.ftsr_ofst	= 0x04,
 	.swier_ofst	= 0x08,
@@ -142,7 +142,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b1 = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b2 = {
 	.imr_ofst	= 0x90,
-	.emr_ofst	= 0x94,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x20,
 	.ftsr_ofst	= 0x24,
 	.swier_ofst	= 0x28,
@@ -152,7 +152,7 @@ static const struct stm32_exti_bank stm32mp1_exti_b2 = {
 
 static const struct stm32_exti_bank stm32mp1_exti_b3 = {
 	.imr_ofst	= 0xA0,
-	.emr_ofst	= 0xA4,
+	.emr_ofst	= UNDEF_REG,
 	.rtsr_ofst	= 0x40,
 	.ftsr_ofst	= 0x44,
 	.swier_ofst	= 0x48,
@@ -795,7 +795,8 @@ stm32_exti_chip_data *stm32_exti_chip_init(struct stm32_exti_host_data *h_data,
 	 * clear registers to avoid residue
 	 */
 	writel_relaxed(0, base + stm32_bank->imr_ofst);
-	writel_relaxed(0, base + stm32_bank->emr_ofst);
+	if (stm32_bank->emr_ofst != UNDEF_REG)
+		writel_relaxed(0, base + stm32_bank->emr_ofst);
 
 	pr_info("%pOF: bank%d\n", node, bank_idx);
 
-- 
2.36.1


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-06-06 16:29 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-10 16:41 [PATCH 1/7] irqchip/stm32-exti: set_affinity return IRQ_SET_MASK_OK_DONE if no parent Antonio Borneo
2022-05-10 16:41 ` Antonio Borneo
2022-05-10 16:41 ` [PATCH 2/7] irqchip/stm32-exti: manage IMR at each mask/unmask for direct event Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-11  8:04   ` Marc Zyngier
2022-05-11  8:04     ` Marc Zyngier
2022-05-10 16:41 ` [PATCH 3/7] irqchip/stm32-exti: remove EMR register access for stm32mp15 Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-10 18:38   ` Marc Zyngier
2022-05-10 18:38     ` Marc Zyngier
2022-05-10 16:41 ` [PATCH 4/7] irqchip/stm32-exti: forward irq_request_resources to parent Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-10 18:44   ` Marc Zyngier
2022-05-10 18:44     ` Marc Zyngier
2022-05-11 14:55     ` Antonio Borneo
2022-05-11 14:55       ` Antonio Borneo
2022-05-12 10:04       ` Marc Zyngier
2022-05-10 16:41 ` [PATCH 5/7] irqchip/stm32-exti: prevent illegal read due to unbounded DT value Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-10 16:41 ` [PATCH 6/7] irqchip/stm32-exti: read event trigger type from event_trg register Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-10 16:41 ` [PATCH 7/7] irqchip/stm32-exti: simplify irq description table Antonio Borneo
2022-05-10 16:41   ` Antonio Borneo
2022-05-10 18:34 ` [PATCH 1/7] irqchip/stm32-exti: set_affinity return IRQ_SET_MASK_OK_DONE if no parent Marc Zyngier
2022-05-10 18:34   ` Marc Zyngier
2022-05-11  6:39   ` Antonio Borneo
2022-05-11  6:39     ` Antonio Borneo
2022-05-11  8:09     ` Marc Zyngier
2022-05-11  8:09       ` Marc Zyngier
2022-06-06 16:27 ` [PATCH v2 0/6] irqchip/stm32-exti: Fixes and simplifications Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-04 12:56   ` Antonio Borneo
2022-07-04 12:56     ` Antonio Borneo
2022-06-06 16:27 ` [PATCH v2 1/6] irqchip/stm32-exti: Fix irq_set_affinity return value Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Ludovic Barre
2022-06-06 16:27 ` [PATCH v2 2/6] irqchip/stm32-exti: Fix irq_mask/irq_unmask for direct events Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Loic Pallardy
2022-06-06 16:27 ` [PATCH v2 3/6] irqchip/stm32-exti: Prevent illegal read due to unbounded DT value Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo
2022-06-06 16:27 ` Antonio Borneo [this message]
2022-06-06 16:27   ` [PATCH v2 4/6] irqchip/stm32-exti: Tag emr register as undefined for stm32mp15 Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Alexandre Torgue
2022-06-06 16:27 ` [PATCH v2 5/6] irqchip/stm32-exti: Read event trigger type from event_trg register Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo
2022-06-06 16:27 ` [PATCH v2 6/6] irqchip/stm32-exti: Simplify irq description table Antonio Borneo
2022-06-06 16:27   ` Antonio Borneo
2022-07-07  8:15   ` [irqchip: irq/irqchip-next] " irqchip-bot for Antonio Borneo

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