From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Tinghan Shen <tinghan.shen@mediatek.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Lee Jones <lee.jones@linaro.org>, Benson Leung <bleung@chromium.org>, Guenter Roeck <groeck@chromium.org>, Sebastian Reichel <sebastian.reichel@collabora.com>, Daisuke Nojiri <dnojiri@chromium.org>, Kees Cook <keescook@chromium.org>, "Gustavo A. R. Silva" <gustavoars@kernel.org>, Prashant Malani <pmalani@chromium.org>, Enric Balletbo i Serra <enric.balletbo@collabora.com>, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev, Project_Global_Chrome_Upstream_Group@mediatek.com, weishunc@google.com Subject: Re: [PATCH v2 2/9] remoteproc: mediatek: Support hanlding scp core 1 wdt timeout Date: Mon, 29 Aug 2022 11:40:21 -0600 [thread overview] Message-ID: <20220829174021.GA2264818@p14s> (raw) In-Reply-To: <20220608083553.8697-3-tinghan.shen@mediatek.com> Hi Tinghan, I have started reviewing this set and I expect comments to be spread out over a few days. I will tell you when I am done. Please see below for comments... On Wed, Jun 08, 2022 at 04:35:46PM +0800, Tinghan Shen wrote: > MT8195 SCP is a dual-core processor. The SCP core 1 watchdog timeout > interrupt uses the same interrupt line of SCP core 0 watchdog timeout > interrupt. > > Add support for handling SCP core 1 watchdog timeout interrupt in the > SCP IRQ handler. > > Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> > --- > drivers/remoteproc/mtk_common.h | 4 ++++ > drivers/remoteproc/mtk_scp.c | 27 ++++++++++++++++++++++++++- > 2 files changed, 30 insertions(+), 1 deletion(-) > > diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h > index ea6fa1100a00..73e8adf00de3 100644 > --- a/drivers/remoteproc/mtk_common.h > +++ b/drivers/remoteproc/mtk_common.h > @@ -54,6 +54,10 @@ > #define MT8192_CORE0_WDT_IRQ 0x10030 > #define MT8192_CORE0_WDT_CFG 0x10034 > > +#define MT8195_SYS_STATUS 0x4004 > +#define MT8195_CORE0_WDT BIT(16) > +#define MT8195_CORE1_WDT BIT(17) > + > #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) > > #define SCP_FW_VER_LEN 32 > diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c > index 47b2a40e1b4a..3510c6d0bbc8 100644 > --- a/drivers/remoteproc/mtk_scp.c > +++ b/drivers/remoteproc/mtk_scp.c > @@ -212,6 +212,31 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) > } > } > > +static void mt8195_scp_irq_handler(struct mtk_scp *scp) > +{ > + u32 scp_to_host; > + > + scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); > + > + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { > + scp_ipi_handler(scp); > + > + /* > + * SCP won't send another interrupt until we clear > + * MT8192_SCP2APMCU_IPC. > + */ > + writel(MT8192_SCP_IPC_INT_BIT, > + scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); > + } else { > + if (readl(scp->reg_base + MT8195_SYS_STATUS) & MT8195_CORE1_WDT) { > + writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ); > + } else { > + writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); > + scp_wdt_handler(scp, scp_to_host); Why is scp_wdt_handler() not called when CORE1 signals a watchdog failure? If this is the intended behaviour there is no way for anyone but you to know that it is the case. > + } > + } > +} > + > static irqreturn_t scp_irq_handler(int irq, void *priv) > { > struct mtk_scp *scp = priv; > @@ -961,7 +986,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { > static const struct mtk_scp_of_data mt8195_of_data = { > .scp_clk_get = mt8195_scp_clk_get, > .scp_before_load = mt8195_scp_before_load, > - .scp_irq_handler = mt8192_scp_irq_handler, > + .scp_irq_handler = mt8195_scp_irq_handler, > .scp_reset_assert = mt8192_scp_reset_assert, > .scp_reset_deassert = mt8192_scp_reset_deassert, > .scp_stop = mt8195_scp_stop, > -- > 2.18.0 >
WARNING: multiple messages have this Message-ID (diff)
From: Mathieu Poirier <mathieu.poirier@linaro.org> To: Tinghan Shen <tinghan.shen@mediatek.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, Lee Jones <lee.jones@linaro.org>, Benson Leung <bleung@chromium.org>, Guenter Roeck <groeck@chromium.org>, Sebastian Reichel <sebastian.reichel@collabora.com>, Daisuke Nojiri <dnojiri@chromium.org>, Kees Cook <keescook@chromium.org>, "Gustavo A. R. Silva" <gustavoars@kernel.org>, Prashant Malani <pmalani@chromium.org>, Enric Balletbo i Serra <enric.balletbo@collabora.com>, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, chrome-platform@lists.linux.dev, Project_Global_Chrome_Upstream_Group@mediatek.com, weishunc@google.com Subject: Re: [PATCH v2 2/9] remoteproc: mediatek: Support hanlding scp core 1 wdt timeout Date: Mon, 29 Aug 2022 11:40:21 -0600 [thread overview] Message-ID: <20220829174021.GA2264818@p14s> (raw) In-Reply-To: <20220608083553.8697-3-tinghan.shen@mediatek.com> Hi Tinghan, I have started reviewing this set and I expect comments to be spread out over a few days. I will tell you when I am done. Please see below for comments... On Wed, Jun 08, 2022 at 04:35:46PM +0800, Tinghan Shen wrote: > MT8195 SCP is a dual-core processor. The SCP core 1 watchdog timeout > interrupt uses the same interrupt line of SCP core 0 watchdog timeout > interrupt. > > Add support for handling SCP core 1 watchdog timeout interrupt in the > SCP IRQ handler. > > Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> > --- > drivers/remoteproc/mtk_common.h | 4 ++++ > drivers/remoteproc/mtk_scp.c | 27 ++++++++++++++++++++++++++- > 2 files changed, 30 insertions(+), 1 deletion(-) > > diff --git a/drivers/remoteproc/mtk_common.h b/drivers/remoteproc/mtk_common.h > index ea6fa1100a00..73e8adf00de3 100644 > --- a/drivers/remoteproc/mtk_common.h > +++ b/drivers/remoteproc/mtk_common.h > @@ -54,6 +54,10 @@ > #define MT8192_CORE0_WDT_IRQ 0x10030 > #define MT8192_CORE0_WDT_CFG 0x10034 > > +#define MT8195_SYS_STATUS 0x4004 > +#define MT8195_CORE0_WDT BIT(16) > +#define MT8195_CORE1_WDT BIT(17) > + > #define MT8195_L1TCM_SRAM_PDN_RESERVED_RSI_BITS GENMASK(7, 4) > > #define SCP_FW_VER_LEN 32 > diff --git a/drivers/remoteproc/mtk_scp.c b/drivers/remoteproc/mtk_scp.c > index 47b2a40e1b4a..3510c6d0bbc8 100644 > --- a/drivers/remoteproc/mtk_scp.c > +++ b/drivers/remoteproc/mtk_scp.c > @@ -212,6 +212,31 @@ static void mt8192_scp_irq_handler(struct mtk_scp *scp) > } > } > > +static void mt8195_scp_irq_handler(struct mtk_scp *scp) > +{ > + u32 scp_to_host; > + > + scp_to_host = readl(scp->reg_base + MT8192_SCP2APMCU_IPC_SET); > + > + if (scp_to_host & MT8192_SCP_IPC_INT_BIT) { > + scp_ipi_handler(scp); > + > + /* > + * SCP won't send another interrupt until we clear > + * MT8192_SCP2APMCU_IPC. > + */ > + writel(MT8192_SCP_IPC_INT_BIT, > + scp->reg_base + MT8192_SCP2APMCU_IPC_CLR); > + } else { > + if (readl(scp->reg_base + MT8195_SYS_STATUS) & MT8195_CORE1_WDT) { > + writel(1, scp->reg_base + MT8195_CORE1_WDT_IRQ); > + } else { > + writel(1, scp->reg_base + MT8192_CORE0_WDT_IRQ); > + scp_wdt_handler(scp, scp_to_host); Why is scp_wdt_handler() not called when CORE1 signals a watchdog failure? If this is the intended behaviour there is no way for anyone but you to know that it is the case. > + } > + } > +} > + > static irqreturn_t scp_irq_handler(int irq, void *priv) > { > struct mtk_scp *scp = priv; > @@ -961,7 +986,7 @@ static const struct mtk_scp_of_data mt8192_of_data = { > static const struct mtk_scp_of_data mt8195_of_data = { > .scp_clk_get = mt8195_scp_clk_get, > .scp_before_load = mt8195_scp_before_load, > - .scp_irq_handler = mt8192_scp_irq_handler, > + .scp_irq_handler = mt8195_scp_irq_handler, > .scp_reset_assert = mt8192_scp_reset_assert, > .scp_reset_deassert = mt8192_scp_reset_deassert, > .scp_stop = mt8195_scp_stop, > -- > 2.18.0 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-08-29 17:40 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-08 8:35 [PATCH v2 0/9] Add support for MT8195 SCP 2nd core Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 1/9] dt-binding: remoteproc: mediatek: Support dual-core SCP Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-09 20:51 ` Rob Herring 2022-06-09 20:51 ` Rob Herring 2022-06-09 20:51 ` Rob Herring 2022-06-08 8:35 ` [PATCH v2 2/9] remoteproc: mediatek: Support hanlding scp core 1 wdt timeout Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-08-29 17:40 ` Mathieu Poirier [this message] 2022-08-29 17:40 ` Mathieu Poirier 2022-09-08 10:38 ` Tinghan Shen 2022-09-08 10:38 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 3/9] remoteproc: mediatek: Add SCP core 1 register definitions Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-08-29 17:46 ` Mathieu Poirier 2022-08-29 17:46 ` Mathieu Poirier 2022-06-08 8:35 ` [PATCH v2 4/9] remoteproc: mediatek: Support probing for the 2nd core of dual-core SCP Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-08-29 19:42 ` Mathieu Poirier 2022-08-29 19:42 ` Mathieu Poirier 2022-09-08 11:17 ` Tinghan Shen 2022-09-08 11:17 ` Tinghan Shen [not found] ` <CANLsYkx6kXk8u_ajFbnhdWTkZBLtrq_z02jryLBSVH0x--_ZFw@mail.gmail.com> 2022-09-16 11:59 ` TingHan Shen 2022-09-16 11:59 ` TingHan Shen 2022-09-16 17:15 ` Mathieu Poirier 2022-09-16 17:15 ` Mathieu Poirier 2022-09-19 9:46 ` TingHan Shen 2022-09-19 9:46 ` TingHan Shen 2022-09-19 20:53 ` Mathieu Poirier 2022-09-19 20:53 ` Mathieu Poirier 2022-09-23 7:12 ` Peng Fan 2022-09-23 7:12 ` Peng Fan 2022-06-08 8:35 ` [PATCH v2 5/9] remoteproc: mediatek: Add chip dependent operations for SCP core 1 Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 6/9] remoteproc: mediatek: Add SCP core 1 SRAM offset Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 7/9] remoteproc: mediatek: Add SCP core 1 as a rproc subdevice Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 8/9] remoteproc: mediatek: Wait SCP core 1 probe done Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` [PATCH v2 9/9] mfd: cros_ec: Add SCP core 1 as a new CrOS EC MCU Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-08 8:35 ` Tinghan Shen 2022-06-09 5:45 ` [PATCH v2 0/9] Add support for MT8195 SCP 2nd core Tinghan Shen 2022-06-09 5:45 ` Tinghan Shen 2022-06-09 5:45 ` Tinghan Shen
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220829174021.GA2264818@p14s \ --to=mathieu.poirier@linaro.org \ --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \ --cc=bjorn.andersson@linaro.org \ --cc=bleung@chromium.org \ --cc=chrome-platform@lists.linux.dev \ --cc=devicetree@vger.kernel.org \ --cc=dnojiri@chromium.org \ --cc=enric.balletbo@collabora.com \ --cc=groeck@chromium.org \ --cc=gustavoars@kernel.org \ --cc=keescook@chromium.org \ --cc=krzk+dt@kernel.org \ --cc=lee.jones@linaro.org \ --cc=linux-arm-kernel@lists.infradead.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-mediatek@lists.infradead.org \ --cc=linux-remoteproc@vger.kernel.org \ --cc=matthias.bgg@gmail.com \ --cc=pmalani@chromium.org \ --cc=robh+dt@kernel.org \ --cc=sebastian.reichel@collabora.com \ --cc=tinghan.shen@mediatek.com \ --cc=weishunc@google.com \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.