From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild@lists.01.org, luca.ceresoli@bootlin.com,
alsa-devel@alsa-project.org, linux-rockchip@lists.infradead.org
Cc: devicetree@vger.kernel.org, kbuild-all@lists.01.org,
lkp@intel.com, Takashi Iwai <tiwai@suse.com>,
Chris Morgan <macromorgan@hotmail.com>,
linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
Mark Brown <broonie@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Luca Ceresoli <luca.ceresoli@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
Heiko Stuebner <heiko@sntech.de>
Subject: Re: [PATCH 7/8] ASoC: codecs: Add RK3308 internal audio codec driver
Date: Thu, 8 Sep 2022 16:35:19 +0300 [thread overview]
Message-ID: <202209082103.F4ICyyHT-lkp@intel.com> (raw)
In-Reply-To: <20220907142124.2532620-8-luca.ceresoli@bootlin.com>
Hi,
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/luca-ceresoli-bootlin-com/Add-support-for-the-internal-RK3308-audio-codec/20220907-222555
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: arc-randconfig-m031-20220908 (https://download.01.org/0day-ci/archive/20220908/202209082103.F4ICyyHT-lkp@intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
sound/soc/codecs/rk3308_codec.c:748 rk3308_set_dai_fmt() error: uninitialized symbol 'is_master'.
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
vim +/is_master +748 sound/soc/codecs/rk3308_codec.c
786c160ad64ae5 Luca Ceresoli 2022-09-07 680 static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
786c160ad64ae5 Luca Ceresoli 2022-09-07 681 unsigned int fmt)
786c160ad64ae5 Luca Ceresoli 2022-09-07 682 {
786c160ad64ae5 Luca Ceresoli 2022-09-07 683 struct snd_soc_component *component = codec_dai->component;
786c160ad64ae5 Luca Ceresoli 2022-09-07 684 struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
786c160ad64ae5 Luca Ceresoli 2022-09-07 685 const unsigned int inv_bits = fmt & SND_SOC_DAIFMT_INV_MASK;
786c160ad64ae5 Luca Ceresoli 2022-09-07 686 const bool inv_bitclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 687 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 688 (inv_bits & SND_SOC_DAIFMT_IB_NF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 689 const bool inv_frmclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 690 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 691 (inv_bits & SND_SOC_DAIFMT_NB_IF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 692
786c160ad64ae5 Luca Ceresoli 2022-09-07 693 unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 694 int grp, is_master;
is_master needs to be initialized to false.
786c160ad64ae5 Luca Ceresoli 2022-09-07 695
786c160ad64ae5 Luca Ceresoli 2022-09-07 696 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 697 case SND_SOC_DAIFMT_CBC_CFC:
786c160ad64ae5 Luca Ceresoli 2022-09-07 698 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 699 case SND_SOC_DAIFMT_CBP_CFP:
786c160ad64ae5 Luca Ceresoli 2022-09-07 700 adc_aif2 |= RK3308_ADC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 701 adc_aif2 |= RK3308_ADC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 702 dac_aif2 |= RK3308_DAC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 703 dac_aif2 |= RK3308_DAC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 704 is_master = 1;
786c160ad64ae5 Luca Ceresoli 2022-09-07 705 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 706 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 707 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 708 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 709
786c160ad64ae5 Luca Ceresoli 2022-09-07 710 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 711 case SND_SOC_DAIFMT_DSP_A:
786c160ad64ae5 Luca Ceresoli 2022-09-07 712 adc_aif1 |= RK3308_ADC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 713 dac_aif1 |= RK3308_DAC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 714 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 715 case SND_SOC_DAIFMT_I2S:
786c160ad64ae5 Luca Ceresoli 2022-09-07 716 adc_aif1 |= RK3308_ADC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 717 dac_aif1 |= RK3308_DAC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 718 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 719 case SND_SOC_DAIFMT_RIGHT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 720 adc_aif1 |= RK3308_ADC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 721 dac_aif1 |= RK3308_DAC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 722 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 723 case SND_SOC_DAIFMT_LEFT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 724 adc_aif1 |= RK3308_ADC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 725 dac_aif1 |= RK3308_DAC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 726 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 727 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 728 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 729 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 730
786c160ad64ae5 Luca Ceresoli 2022-09-07 731 if (inv_bitclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 732 adc_aif2 |= RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 733 dac_aif2 |= RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 734 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 735
786c160ad64ae5 Luca Ceresoli 2022-09-07 736 if (inv_frmclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 737 adc_aif1 |= RK3308_ADC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 738 dac_aif1 |= RK3308_DAC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 739 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 740
786c160ad64ae5 Luca Ceresoli 2022-09-07 741 /*
786c160ad64ae5 Luca Ceresoli 2022-09-07 742 * Hold ADC Digital registers start at master mode
786c160ad64ae5 Luca Ceresoli 2022-09-07 743 *
786c160ad64ae5 Luca Ceresoli 2022-09-07 744 * There are 8 ADCs and use the same SCLK and LRCK internal for master
786c160ad64ae5 Luca Ceresoli 2022-09-07 745 * mode, We need to make sure that they are in effect at the same time,
786c160ad64ae5 Luca Ceresoli 2022-09-07 746 * otherwise they will cause the abnormal clocks.
786c160ad64ae5 Luca Ceresoli 2022-09-07 747 */
786c160ad64ae5 Luca Ceresoli 2022-09-07 @748 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 749 regmap_clear_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 750
786c160ad64ae5 Luca Ceresoli 2022-09-07 751 for (grp = 0; grp < ADC_LR_GROUP_MAX; grp++) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 752 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 753 RK3308_ADC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 754 RK3308_ADC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 755 adc_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 756 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON02(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 757 RK3308_ADC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 758 RK3308_ADC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 759 RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 760 adc_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 761 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 762
786c160ad64ae5 Luca Ceresoli 2022-09-07 763 /* Hold ADC Digital registers end at master mode */
786c160ad64ae5 Luca Ceresoli 2022-09-07 764 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 765 regmap_set_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 766
786c160ad64ae5 Luca Ceresoli 2022-09-07 767 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON01,
786c160ad64ae5 Luca Ceresoli 2022-09-07 768 RK3308_DAC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 769 RK3308_DAC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 770 dac_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 771 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON02,
786c160ad64ae5 Luca Ceresoli 2022-09-07 772 RK3308_DAC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 773 RK3308_DAC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 774 RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 775 dac_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 776
786c160ad64ae5 Luca Ceresoli 2022-09-07 777 return 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 778 }
--
0-DAY CI Kernel Test Service
https://01.org/lkp
WARNING: multiple messages have this Message-ID (diff)
From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild@lists.01.org, luca.ceresoli@bootlin.com,
alsa-devel@alsa-project.org, linux-rockchip@lists.infradead.org
Cc: lkp@intel.com, kbuild-all@lists.01.org,
Luca Ceresoli <luca.ceresoli@bootlin.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Liam Girdwood <lgirdwood@gmail.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzk@kernel.org>,
Heiko Stuebner <heiko@sntech.de>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Nicolas Frattaroli <frattaroli.nicolas@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Johan Jonker <jbx6244@gmail.com>,
Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH 7/8] ASoC: codecs: Add RK3308 internal audio codec driver
Date: Thu, 8 Sep 2022 16:35:19 +0300 [thread overview]
Message-ID: <202209082103.F4ICyyHT-lkp@intel.com> (raw)
In-Reply-To: <20220907142124.2532620-8-luca.ceresoli@bootlin.com>
Hi,
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/luca-ceresoli-bootlin-com/Add-support-for-the-internal-RK3308-audio-codec/20220907-222555
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: arc-randconfig-m031-20220908 (https://download.01.org/0day-ci/archive/20220908/202209082103.F4ICyyHT-lkp@intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
sound/soc/codecs/rk3308_codec.c:748 rk3308_set_dai_fmt() error: uninitialized symbol 'is_master'.
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
vim +/is_master +748 sound/soc/codecs/rk3308_codec.c
786c160ad64ae5 Luca Ceresoli 2022-09-07 680 static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
786c160ad64ae5 Luca Ceresoli 2022-09-07 681 unsigned int fmt)
786c160ad64ae5 Luca Ceresoli 2022-09-07 682 {
786c160ad64ae5 Luca Ceresoli 2022-09-07 683 struct snd_soc_component *component = codec_dai->component;
786c160ad64ae5 Luca Ceresoli 2022-09-07 684 struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
786c160ad64ae5 Luca Ceresoli 2022-09-07 685 const unsigned int inv_bits = fmt & SND_SOC_DAIFMT_INV_MASK;
786c160ad64ae5 Luca Ceresoli 2022-09-07 686 const bool inv_bitclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 687 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 688 (inv_bits & SND_SOC_DAIFMT_IB_NF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 689 const bool inv_frmclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 690 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 691 (inv_bits & SND_SOC_DAIFMT_NB_IF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 692
786c160ad64ae5 Luca Ceresoli 2022-09-07 693 unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 694 int grp, is_master;
is_master needs to be initialized to false.
786c160ad64ae5 Luca Ceresoli 2022-09-07 695
786c160ad64ae5 Luca Ceresoli 2022-09-07 696 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 697 case SND_SOC_DAIFMT_CBC_CFC:
786c160ad64ae5 Luca Ceresoli 2022-09-07 698 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 699 case SND_SOC_DAIFMT_CBP_CFP:
786c160ad64ae5 Luca Ceresoli 2022-09-07 700 adc_aif2 |= RK3308_ADC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 701 adc_aif2 |= RK3308_ADC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 702 dac_aif2 |= RK3308_DAC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 703 dac_aif2 |= RK3308_DAC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 704 is_master = 1;
786c160ad64ae5 Luca Ceresoli 2022-09-07 705 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 706 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 707 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 708 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 709
786c160ad64ae5 Luca Ceresoli 2022-09-07 710 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 711 case SND_SOC_DAIFMT_DSP_A:
786c160ad64ae5 Luca Ceresoli 2022-09-07 712 adc_aif1 |= RK3308_ADC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 713 dac_aif1 |= RK3308_DAC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 714 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 715 case SND_SOC_DAIFMT_I2S:
786c160ad64ae5 Luca Ceresoli 2022-09-07 716 adc_aif1 |= RK3308_ADC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 717 dac_aif1 |= RK3308_DAC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 718 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 719 case SND_SOC_DAIFMT_RIGHT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 720 adc_aif1 |= RK3308_ADC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 721 dac_aif1 |= RK3308_DAC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 722 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 723 case SND_SOC_DAIFMT_LEFT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 724 adc_aif1 |= RK3308_ADC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 725 dac_aif1 |= RK3308_DAC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 726 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 727 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 728 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 729 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 730
786c160ad64ae5 Luca Ceresoli 2022-09-07 731 if (inv_bitclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 732 adc_aif2 |= RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 733 dac_aif2 |= RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 734 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 735
786c160ad64ae5 Luca Ceresoli 2022-09-07 736 if (inv_frmclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 737 adc_aif1 |= RK3308_ADC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 738 dac_aif1 |= RK3308_DAC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 739 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 740
786c160ad64ae5 Luca Ceresoli 2022-09-07 741 /*
786c160ad64ae5 Luca Ceresoli 2022-09-07 742 * Hold ADC Digital registers start at master mode
786c160ad64ae5 Luca Ceresoli 2022-09-07 743 *
786c160ad64ae5 Luca Ceresoli 2022-09-07 744 * There are 8 ADCs and use the same SCLK and LRCK internal for master
786c160ad64ae5 Luca Ceresoli 2022-09-07 745 * mode, We need to make sure that they are in effect at the same time,
786c160ad64ae5 Luca Ceresoli 2022-09-07 746 * otherwise they will cause the abnormal clocks.
786c160ad64ae5 Luca Ceresoli 2022-09-07 747 */
786c160ad64ae5 Luca Ceresoli 2022-09-07 @748 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 749 regmap_clear_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 750
786c160ad64ae5 Luca Ceresoli 2022-09-07 751 for (grp = 0; grp < ADC_LR_GROUP_MAX; grp++) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 752 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 753 RK3308_ADC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 754 RK3308_ADC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 755 adc_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 756 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON02(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 757 RK3308_ADC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 758 RK3308_ADC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 759 RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 760 adc_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 761 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 762
786c160ad64ae5 Luca Ceresoli 2022-09-07 763 /* Hold ADC Digital registers end at master mode */
786c160ad64ae5 Luca Ceresoli 2022-09-07 764 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 765 regmap_set_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 766
786c160ad64ae5 Luca Ceresoli 2022-09-07 767 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON01,
786c160ad64ae5 Luca Ceresoli 2022-09-07 768 RK3308_DAC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 769 RK3308_DAC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 770 dac_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 771 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON02,
786c160ad64ae5 Luca Ceresoli 2022-09-07 772 RK3308_DAC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 773 RK3308_DAC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 774 RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 775 dac_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 776
786c160ad64ae5 Luca Ceresoli 2022-09-07 777 return 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 778 }
--
0-DAY CI Kernel Test Service
https://01.org/lkp
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WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: kbuild@lists.01.org
Subject: Re: [PATCH 7/8] ASoC: codecs: Add RK3308 internal audio codec driver
Date: Thu, 08 Sep 2022 21:24:36 +0800 [thread overview]
Message-ID: <202209082103.F4ICyyHT-lkp@intel.com> (raw)
[-- Attachment #1: Type: text/plain, Size: 10169 bytes --]
BCC: lkp(a)intel.com
CC: kbuild-all(a)lists.01.org
In-Reply-To: <20220907142124.2532620-8-luca.ceresoli@bootlin.com>
References: <20220907142124.2532620-8-luca.ceresoli@bootlin.com>
TO: luca.ceresoli(a)bootlin.com
TO: alsa-devel(a)alsa-project.org
TO: linux-rockchip(a)lists.infradead.org
CC: Luca Ceresoli <luca.ceresoli@bootlin.com>
CC: devicetree(a)vger.kernel.org
CC: linux-arm-kernel(a)lists.infradead.org
CC: linux-kernel(a)vger.kernel.org
CC: Liam Girdwood <lgirdwood@gmail.com>
CC: Mark Brown <broonie@kernel.org>
CC: Rob Herring <robh+dt@kernel.org>
CC: Krzysztof Kozlowski <krzk@kernel.org>
CC: Heiko Stuebner <heiko@sntech.de>
CC: Jaroslav Kysela <perex@perex.cz>
CC: Takashi Iwai <tiwai@suse.com>
CC: Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
CC: Philipp Zabel <p.zabel@pengutronix.de>
CC: Johan Jonker <jbx6244@gmail.com>
CC: Chris Morgan <macromorgan@hotmail.com>
Hi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on broonie-sound/for-next]
[also build test WARNING on rockchip/for-next tiwai-sound/for-next linus/master v6.0-rc4 next-20220908]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/luca-ceresoli-bootlin-com/Add-support-for-the-internal-RK3308-audio-codec/20220907-222555
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
:::::: branch date: 23 hours ago
:::::: commit date: 23 hours ago
config: arc-randconfig-m031-20220908 (https://download.01.org/0day-ci/archive/20220908/202209082103.F4ICyyHT-lkp(a)intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
sound/soc/codecs/rk3308_codec.c:748 rk3308_set_dai_fmt() error: uninitialized symbol 'is_master'.
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
vim +/is_master +748 sound/soc/codecs/rk3308_codec.c
786c160ad64ae5 Luca Ceresoli 2022-09-07 679
786c160ad64ae5 Luca Ceresoli 2022-09-07 680 static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
786c160ad64ae5 Luca Ceresoli 2022-09-07 681 unsigned int fmt)
786c160ad64ae5 Luca Ceresoli 2022-09-07 682 {
786c160ad64ae5 Luca Ceresoli 2022-09-07 683 struct snd_soc_component *component = codec_dai->component;
786c160ad64ae5 Luca Ceresoli 2022-09-07 684 struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
786c160ad64ae5 Luca Ceresoli 2022-09-07 685 const unsigned int inv_bits = fmt & SND_SOC_DAIFMT_INV_MASK;
786c160ad64ae5 Luca Ceresoli 2022-09-07 686 const bool inv_bitclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 687 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 688 (inv_bits & SND_SOC_DAIFMT_IB_NF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 689 const bool inv_frmclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 690 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 691 (inv_bits & SND_SOC_DAIFMT_NB_IF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 692
786c160ad64ae5 Luca Ceresoli 2022-09-07 693 unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 694 int grp, is_master;
786c160ad64ae5 Luca Ceresoli 2022-09-07 695
786c160ad64ae5 Luca Ceresoli 2022-09-07 696 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 697 case SND_SOC_DAIFMT_CBC_CFC:
786c160ad64ae5 Luca Ceresoli 2022-09-07 698 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 699 case SND_SOC_DAIFMT_CBP_CFP:
786c160ad64ae5 Luca Ceresoli 2022-09-07 700 adc_aif2 |= RK3308_ADC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 701 adc_aif2 |= RK3308_ADC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 702 dac_aif2 |= RK3308_DAC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 703 dac_aif2 |= RK3308_DAC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 704 is_master = 1;
786c160ad64ae5 Luca Ceresoli 2022-09-07 705 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 706 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 707 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 708 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 709
786c160ad64ae5 Luca Ceresoli 2022-09-07 710 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 711 case SND_SOC_DAIFMT_DSP_A:
786c160ad64ae5 Luca Ceresoli 2022-09-07 712 adc_aif1 |= RK3308_ADC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 713 dac_aif1 |= RK3308_DAC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 714 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 715 case SND_SOC_DAIFMT_I2S:
786c160ad64ae5 Luca Ceresoli 2022-09-07 716 adc_aif1 |= RK3308_ADC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 717 dac_aif1 |= RK3308_DAC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 718 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 719 case SND_SOC_DAIFMT_RIGHT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 720 adc_aif1 |= RK3308_ADC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 721 dac_aif1 |= RK3308_DAC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 722 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 723 case SND_SOC_DAIFMT_LEFT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 724 adc_aif1 |= RK3308_ADC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 725 dac_aif1 |= RK3308_DAC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 726 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 727 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 728 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 729 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 730
786c160ad64ae5 Luca Ceresoli 2022-09-07 731 if (inv_bitclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 732 adc_aif2 |= RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 733 dac_aif2 |= RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 734 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 735
786c160ad64ae5 Luca Ceresoli 2022-09-07 736 if (inv_frmclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 737 adc_aif1 |= RK3308_ADC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 738 dac_aif1 |= RK3308_DAC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 739 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 740
786c160ad64ae5 Luca Ceresoli 2022-09-07 741 /*
786c160ad64ae5 Luca Ceresoli 2022-09-07 742 * Hold ADC Digital registers start at master mode
786c160ad64ae5 Luca Ceresoli 2022-09-07 743 *
786c160ad64ae5 Luca Ceresoli 2022-09-07 744 * There are 8 ADCs and use the same SCLK and LRCK internal for master
786c160ad64ae5 Luca Ceresoli 2022-09-07 745 * mode, We need to make sure that they are in effect at the same time,
786c160ad64ae5 Luca Ceresoli 2022-09-07 746 * otherwise they will cause the abnormal clocks.
786c160ad64ae5 Luca Ceresoli 2022-09-07 747 */
786c160ad64ae5 Luca Ceresoli 2022-09-07 @748 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 749 regmap_clear_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 750
786c160ad64ae5 Luca Ceresoli 2022-09-07 751 for (grp = 0; grp < ADC_LR_GROUP_MAX; grp++) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 752 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 753 RK3308_ADC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 754 RK3308_ADC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 755 adc_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 756 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON02(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 757 RK3308_ADC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 758 RK3308_ADC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 759 RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 760 adc_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 761 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 762
786c160ad64ae5 Luca Ceresoli 2022-09-07 763 /* Hold ADC Digital registers end at master mode */
786c160ad64ae5 Luca Ceresoli 2022-09-07 764 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 765 regmap_set_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 766
786c160ad64ae5 Luca Ceresoli 2022-09-07 767 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON01,
786c160ad64ae5 Luca Ceresoli 2022-09-07 768 RK3308_DAC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 769 RK3308_DAC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 770 dac_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 771 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON02,
786c160ad64ae5 Luca Ceresoli 2022-09-07 772 RK3308_DAC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 773 RK3308_DAC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 774 RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 775 dac_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 776
786c160ad64ae5 Luca Ceresoli 2022-09-07 777 return 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 778 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 779
--
0-DAY CI Kernel Test Service
https://01.org/lkp
WARNING: multiple messages have this Message-ID (diff)
From: Dan Carpenter <dan.carpenter@oracle.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH 7/8] ASoC: codecs: Add RK3308 internal audio codec driver
Date: Thu, 08 Sep 2022 16:35:19 +0300 [thread overview]
Message-ID: <202209082103.F4ICyyHT-lkp@intel.com> (raw)
In-Reply-To: <20220907142124.2532620-8-luca.ceresoli@bootlin.com>
[-- Attachment #1: Type: text/plain, Size: 8791 bytes --]
Hi,
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/luca-ceresoli-bootlin-com/Add-support-for-the-internal-RK3308-audio-codec/20220907-222555
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: arc-randconfig-m031-20220908 (https://download.01.org/0day-ci/archive/20220908/202209082103.F4ICyyHT-lkp(a)intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
smatch warnings:
sound/soc/codecs/rk3308_codec.c:748 rk3308_set_dai_fmt() error: uninitialized symbol 'is_master'.
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
sound/soc/codecs/rk3308_codec.c:998 rk3308_codec_digital_fadeout() warn: always true condition '(l_dgain >= (0 << 0)) => (0-u32max >= 0)'
vim +/is_master +748 sound/soc/codecs/rk3308_codec.c
786c160ad64ae5 Luca Ceresoli 2022-09-07 680 static int rk3308_set_dai_fmt(struct snd_soc_dai *codec_dai,
786c160ad64ae5 Luca Ceresoli 2022-09-07 681 unsigned int fmt)
786c160ad64ae5 Luca Ceresoli 2022-09-07 682 {
786c160ad64ae5 Luca Ceresoli 2022-09-07 683 struct snd_soc_component *component = codec_dai->component;
786c160ad64ae5 Luca Ceresoli 2022-09-07 684 struct rk3308_codec_priv *rk3308 = snd_soc_component_get_drvdata(component);
786c160ad64ae5 Luca Ceresoli 2022-09-07 685 const unsigned int inv_bits = fmt & SND_SOC_DAIFMT_INV_MASK;
786c160ad64ae5 Luca Ceresoli 2022-09-07 686 const bool inv_bitclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 687 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 688 (inv_bits & SND_SOC_DAIFMT_IB_NF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 689 const bool inv_frmclk =
786c160ad64ae5 Luca Ceresoli 2022-09-07 690 (inv_bits & SND_SOC_DAIFMT_IB_IF) ||
786c160ad64ae5 Luca Ceresoli 2022-09-07 691 (inv_bits & SND_SOC_DAIFMT_NB_IF);
786c160ad64ae5 Luca Ceresoli 2022-09-07 692
786c160ad64ae5 Luca Ceresoli 2022-09-07 693 unsigned int adc_aif1 = 0, adc_aif2 = 0, dac_aif1 = 0, dac_aif2 = 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 694 int grp, is_master;
is_master needs to be initialized to false.
786c160ad64ae5 Luca Ceresoli 2022-09-07 695
786c160ad64ae5 Luca Ceresoli 2022-09-07 696 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 697 case SND_SOC_DAIFMT_CBC_CFC:
786c160ad64ae5 Luca Ceresoli 2022-09-07 698 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 699 case SND_SOC_DAIFMT_CBP_CFP:
786c160ad64ae5 Luca Ceresoli 2022-09-07 700 adc_aif2 |= RK3308_ADC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 701 adc_aif2 |= RK3308_ADC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 702 dac_aif2 |= RK3308_DAC_IO_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 703 dac_aif2 |= RK3308_DAC_MODE_MASTER;
786c160ad64ae5 Luca Ceresoli 2022-09-07 704 is_master = 1;
786c160ad64ae5 Luca Ceresoli 2022-09-07 705 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 706 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 707 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 708 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 709
786c160ad64ae5 Luca Ceresoli 2022-09-07 710 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 711 case SND_SOC_DAIFMT_DSP_A:
786c160ad64ae5 Luca Ceresoli 2022-09-07 712 adc_aif1 |= RK3308_ADC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 713 dac_aif1 |= RK3308_DAC_I2S_MODE_PCM;
786c160ad64ae5 Luca Ceresoli 2022-09-07 714 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 715 case SND_SOC_DAIFMT_I2S:
786c160ad64ae5 Luca Ceresoli 2022-09-07 716 adc_aif1 |= RK3308_ADC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 717 dac_aif1 |= RK3308_DAC_I2S_MODE_I2S;
786c160ad64ae5 Luca Ceresoli 2022-09-07 718 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 719 case SND_SOC_DAIFMT_RIGHT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 720 adc_aif1 |= RK3308_ADC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 721 dac_aif1 |= RK3308_DAC_I2S_MODE_RJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 722 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 723 case SND_SOC_DAIFMT_LEFT_J:
786c160ad64ae5 Luca Ceresoli 2022-09-07 724 adc_aif1 |= RK3308_ADC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 725 dac_aif1 |= RK3308_DAC_I2S_MODE_LJ;
786c160ad64ae5 Luca Ceresoli 2022-09-07 726 break;
786c160ad64ae5 Luca Ceresoli 2022-09-07 727 default:
786c160ad64ae5 Luca Ceresoli 2022-09-07 728 return -EINVAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 729 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 730
786c160ad64ae5 Luca Ceresoli 2022-09-07 731 if (inv_bitclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 732 adc_aif2 |= RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 733 dac_aif2 |= RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 734 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 735
786c160ad64ae5 Luca Ceresoli 2022-09-07 736 if (inv_frmclk) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 737 adc_aif1 |= RK3308_ADC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 738 dac_aif1 |= RK3308_DAC_I2S_LRC_POL_REVERSAL;
786c160ad64ae5 Luca Ceresoli 2022-09-07 739 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 740
786c160ad64ae5 Luca Ceresoli 2022-09-07 741 /*
786c160ad64ae5 Luca Ceresoli 2022-09-07 742 * Hold ADC Digital registers start at master mode
786c160ad64ae5 Luca Ceresoli 2022-09-07 743 *
786c160ad64ae5 Luca Ceresoli 2022-09-07 744 * There are 8 ADCs and use the same SCLK and LRCK internal for master
786c160ad64ae5 Luca Ceresoli 2022-09-07 745 * mode, We need to make sure that they are in effect at the same time,
786c160ad64ae5 Luca Ceresoli 2022-09-07 746 * otherwise they will cause the abnormal clocks.
786c160ad64ae5 Luca Ceresoli 2022-09-07 747 */
786c160ad64ae5 Luca Ceresoli 2022-09-07 @748 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 749 regmap_clear_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 750
786c160ad64ae5 Luca Ceresoli 2022-09-07 751 for (grp = 0; grp < ADC_LR_GROUP_MAX; grp++) {
786c160ad64ae5 Luca Ceresoli 2022-09-07 752 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON01(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 753 RK3308_ADC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 754 RK3308_ADC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 755 adc_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 756 regmap_update_bits(rk3308->regmap, RK3308_ADC_DIG_CON02(grp),
786c160ad64ae5 Luca Ceresoli 2022-09-07 757 RK3308_ADC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 758 RK3308_ADC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 759 RK3308_ADC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 760 adc_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 761 }
786c160ad64ae5 Luca Ceresoli 2022-09-07 762
786c160ad64ae5 Luca Ceresoli 2022-09-07 763 /* Hold ADC Digital registers end at master mode */
786c160ad64ae5 Luca Ceresoli 2022-09-07 764 if (is_master)
786c160ad64ae5 Luca Ceresoli 2022-09-07 765 regmap_set_bits(rk3308->regmap, RK3308_GLB_CON, RK3308_ADC_DIG_WORK);
786c160ad64ae5 Luca Ceresoli 2022-09-07 766
786c160ad64ae5 Luca Ceresoli 2022-09-07 767 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON01,
786c160ad64ae5 Luca Ceresoli 2022-09-07 768 RK3308_DAC_I2S_LRC_POL_REVERSAL |
786c160ad64ae5 Luca Ceresoli 2022-09-07 769 RK3308_DAC_I2S_MODE_MSK,
786c160ad64ae5 Luca Ceresoli 2022-09-07 770 dac_aif1);
786c160ad64ae5 Luca Ceresoli 2022-09-07 771 regmap_update_bits(rk3308->regmap, RK3308_DAC_DIG_CON02,
786c160ad64ae5 Luca Ceresoli 2022-09-07 772 RK3308_DAC_IO_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 773 RK3308_DAC_MODE_MASTER |
786c160ad64ae5 Luca Ceresoli 2022-09-07 774 RK3308_DAC_I2S_BIT_CLK_POL_REVERSAL,
786c160ad64ae5 Luca Ceresoli 2022-09-07 775 dac_aif2);
786c160ad64ae5 Luca Ceresoli 2022-09-07 776
786c160ad64ae5 Luca Ceresoli 2022-09-07 777 return 0;
786c160ad64ae5 Luca Ceresoli 2022-09-07 778 }
--
0-DAY CI Kernel Test Service
https://01.org/lkp
next prev parent reply other threads:[~2022-09-08 13:36 UTC|newest]
Thread overview: 96+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-07 14:21 [PATCH 0/8] Add support for the internal RK3308 audio codec luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` [PATCH 1/8] ASoC: rockchip: rk3308: add internal audio codec bindings luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-07 14:21 ` [PATCH 2/8] ASoC: rockchip: rk3308: add audio card bindings luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-08 11:49 ` Krzysztof Kozlowski
2022-09-08 11:49 ` Krzysztof Kozlowski
2022-09-08 11:49 ` Krzysztof Kozlowski
2022-09-08 11:49 ` Krzysztof Kozlowski
2022-09-08 15:20 ` Luca Ceresoli
2022-09-08 15:20 ` Luca Ceresoli
2022-09-08 15:20 ` Luca Ceresoli
2022-09-08 15:20 ` Luca Ceresoli
2022-09-08 15:28 ` Krzysztof Kozlowski
2022-09-08 15:28 ` Krzysztof Kozlowski
2022-09-08 15:28 ` Krzysztof Kozlowski
2022-09-08 15:28 ` Krzysztof Kozlowski
2022-09-07 14:21 ` [PATCH 3/8] arm64: dts: rockchip: add i2s_8ch_2 and i2s_8ch_3 luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` [PATCH 4/8] arm64: dts: rockchip: add the internal audio codec luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-08 11:53 ` Krzysztof Kozlowski
2022-09-07 14:21 ` [PATCH 5/8] ASoC: rockchip: i2s-tdm: Fix clk_id usage in .set_sysclk() luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-08 16:36 ` Mark Brown
2022-09-08 16:36 ` Mark Brown
2022-09-08 16:36 ` Mark Brown
2022-09-08 16:36 ` Mark Brown
2022-09-07 14:21 ` [PATCH 6/8] ASoC: audio-graph: let dai_link->init be overridable luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` [PATCH 7/8] ASoC: codecs: Add RK3308 internal audio codec driver luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 17:40 ` kernel test robot
2022-09-07 17:40 ` kernel test robot
2022-09-07 17:40 ` kernel test robot
2022-09-07 19:53 ` kernel test robot
2022-09-07 19:53 ` kernel test robot
2022-09-07 19:53 ` kernel test robot
2022-09-07 19:53 ` kernel test robot
2022-09-08 13:24 ` kernel test robot [this message]
2022-09-08 13:35 ` Dan Carpenter
2022-09-08 13:35 ` Dan Carpenter
2022-09-08 13:35 ` Dan Carpenter
2022-09-08 15:33 ` Luca Ceresoli
2022-09-08 15:33 ` Luca Ceresoli
2022-09-08 15:33 ` Luca Ceresoli
2022-09-08 15:33 ` Luca Ceresoli
2022-09-08 15:33 ` Luca Ceresoli
2022-09-08 16:27 ` Mark Brown
2022-09-08 16:27 ` Mark Brown
2022-09-08 16:27 ` Mark Brown
2022-09-08 16:27 ` Mark Brown
2022-09-09 17:11 ` Luca Ceresoli
2022-09-09 17:11 ` Luca Ceresoli
2022-09-09 17:11 ` Luca Ceresoli
2022-09-09 17:11 ` Luca Ceresoli
2022-09-09 23:15 ` kernel test robot
2022-09-09 23:15 ` kernel test robot
2022-09-09 23:15 ` kernel test robot
2022-09-09 23:15 ` kernel test robot
2022-09-07 14:21 ` [PATCH 8/8] ASoC: rockchip: add new RK3308 sound card luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 14:21 ` luca.ceresoli
2022-09-07 15:41 ` [PATCH 0/8] Add support for the internal RK3308 audio codec Mark Brown
2022-09-07 15:41 ` Mark Brown
2022-09-07 15:41 ` Mark Brown
2022-09-07 15:41 ` Mark Brown
2022-09-07 17:15 ` Luca Ceresoli
2022-09-07 17:15 ` Luca Ceresoli
2022-09-07 17:15 ` Luca Ceresoli
2022-09-07 17:15 ` Luca Ceresoli
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