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From: Will Deacon <will@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Jiri Olsa <jolsa@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Ingo Molnar <mingo@redhat.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org,
	linux-kernel@vger.kernel.org, James Clark <james.clark@arm.com>,
	Mark Brown <broonie@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v3 0/8] perf: Arm SPEv1.2 support
Date: Fri, 18 Nov 2022 16:50:26 +0000	[thread overview]
Message-ID: <20221118165025.GB4872@willie-the-truck> (raw)
In-Reply-To: <CAL_Jsq+WOjoPW0FDSa=B9-aCMwXC3tc5HUqokoVkKUucKgqanQ@mail.gmail.com>

On Thu, Nov 17, 2022 at 08:43:17AM -0600, Rob Herring wrote:
> On Fri, Nov 4, 2022 at 10:55 AM Rob Herring <robh@kernel.org> wrote:
> >
> > This series adds support for Arm SPEv1.2 which is part of the
> > Armv8.7/Armv9.2 architecture. There's 2 new features that affect the
> > kernel: a new event filter bit, branch 'not taken', and an inverted
> > event filter register.
> >
> > Since this support adds new registers and fields, first the SPE register
> > defines are converted to automatic generation.
> >
> > Note that the 'config3' addition in sysfs format files causes SPE to
> > break. A stable fix e552b7be12ed ("perf: Skip and warn on unknown format
> > 'configN' attrs") landed in v6.1-rc1.
> >
> > The perf tool side changes are available here[1].
> >
> > Tested on FVP.
> >
> > [1] https://lore.kernel.org/all/20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org/
> >
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > ---
> > Changes in v3:
> > - Add some more missing SPE register fields and use Enums for some
> >   fields
> > - Use the new PMSIDR_EL1 register Enum defines in the SPE driver
> > - Link to v2: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v2-0-e37322d68ac0@kernel.org
> >
> > Changes in v2:
> > - Convert the SPE register defines to automatic generation
> > - Fixed access to SYS_PMSNEVFR_EL1 when not present
> > - Rebase on v6.1-rc1
> > - Link to v1: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v1-0-c75b8d92e692@kernel.org
> >
> > ---
> > Rob Herring (8):
> >       perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines
> >       arm64: Drop SYS_ from SPE register defines
> >       arm64/sysreg: Convert SPE registers to automatic generation
> >       perf: arm_spe: Drop BIT() and use FIELD_GET/PREP accessors
> >       perf: arm_spe: Use new PMSIDR_EL1 register enums
> >       perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event
> >       perf: Add perf_event_attr::config3
> >       perf: arm_spe: Add support for SPEv1.2 inverted event filtering
> >
> >  arch/arm64/include/asm/el2_setup.h |   6 +-
> >  arch/arm64/include/asm/sysreg.h    |  99 +++--------------------
> >  arch/arm64/kvm/debug.c             |   2 +-
> >  arch/arm64/kvm/hyp/nvhe/debug-sr.c |   2 +-
> >  arch/arm64/tools/sysreg            | 139 +++++++++++++++++++++++++++++++++
> >  drivers/perf/arm_spe_pmu.c         | 156 ++++++++++++++++++++++++-------------
> >  include/uapi/linux/perf_event.h    |   3 +
> >  7 files changed, 257 insertions(+), 150 deletions(-)
> 
> Will, any comments on this series?

Looks fine to me. Happy to queue it once the uapi change has been acked.

Will

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	linux-perf-users@vger.kernel.org,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Ingo Molnar <mingo@redhat.com>, Jiri Olsa <jolsa@kernel.org>,
	Marc Zyngier <maz@kernel.org>,
	kvmarm@lists.linux.dev, Namhyung Kim <namhyung@kernel.org>,
	kvmarm@lists.cs.columbia.edu,
	linux-arm-kernel@lists.infradead.org,
	James Clark <james.clark@arm.com>
Subject: Re: [PATCH v3 0/8] perf: Arm SPEv1.2 support
Date: Fri, 18 Nov 2022 16:50:26 +0000	[thread overview]
Message-ID: <20221118165025.GB4872@willie-the-truck> (raw)
In-Reply-To: <CAL_Jsq+WOjoPW0FDSa=B9-aCMwXC3tc5HUqokoVkKUucKgqanQ@mail.gmail.com>

On Thu, Nov 17, 2022 at 08:43:17AM -0600, Rob Herring wrote:
> On Fri, Nov 4, 2022 at 10:55 AM Rob Herring <robh@kernel.org> wrote:
> >
> > This series adds support for Arm SPEv1.2 which is part of the
> > Armv8.7/Armv9.2 architecture. There's 2 new features that affect the
> > kernel: a new event filter bit, branch 'not taken', and an inverted
> > event filter register.
> >
> > Since this support adds new registers and fields, first the SPE register
> > defines are converted to automatic generation.
> >
> > Note that the 'config3' addition in sysfs format files causes SPE to
> > break. A stable fix e552b7be12ed ("perf: Skip and warn on unknown format
> > 'configN' attrs") landed in v6.1-rc1.
> >
> > The perf tool side changes are available here[1].
> >
> > Tested on FVP.
> >
> > [1] https://lore.kernel.org/all/20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org/
> >
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > ---
> > Changes in v3:
> > - Add some more missing SPE register fields and use Enums for some
> >   fields
> > - Use the new PMSIDR_EL1 register Enum defines in the SPE driver
> > - Link to v2: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v2-0-e37322d68ac0@kernel.org
> >
> > Changes in v2:
> > - Convert the SPE register defines to automatic generation
> > - Fixed access to SYS_PMSNEVFR_EL1 when not present
> > - Rebase on v6.1-rc1
> > - Link to v1: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v1-0-c75b8d92e692@kernel.org
> >
> > ---
> > Rob Herring (8):
> >       perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines
> >       arm64: Drop SYS_ from SPE register defines
> >       arm64/sysreg: Convert SPE registers to automatic generation
> >       perf: arm_spe: Drop BIT() and use FIELD_GET/PREP accessors
> >       perf: arm_spe: Use new PMSIDR_EL1 register enums
> >       perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event
> >       perf: Add perf_event_attr::config3
> >       perf: arm_spe: Add support for SPEv1.2 inverted event filtering
> >
> >  arch/arm64/include/asm/el2_setup.h |   6 +-
> >  arch/arm64/include/asm/sysreg.h    |  99 +++--------------------
> >  arch/arm64/kvm/debug.c             |   2 +-
> >  arch/arm64/kvm/hyp/nvhe/debug-sr.c |   2 +-
> >  arch/arm64/tools/sysreg            | 139 +++++++++++++++++++++++++++++++++
> >  drivers/perf/arm_spe_pmu.c         | 156 ++++++++++++++++++++++++-------------
> >  include/uapi/linux/perf_event.h    |   3 +
> >  7 files changed, 257 insertions(+), 150 deletions(-)
> 
> Will, any comments on this series?

Looks fine to me. Happy to queue it once the uapi change has been acked.

Will
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: Rob Herring <robh@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Jiri Olsa <jolsa@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	Ingo Molnar <mingo@redhat.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	James Morse <james.morse@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	kvmarm@lists.linux.dev, linux-perf-users@vger.kernel.org,
	linux-kernel@vger.kernel.org, James Clark <james.clark@arm.com>,
	Mark Brown <broonie@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu
Subject: Re: [PATCH v3 0/8] perf: Arm SPEv1.2 support
Date: Fri, 18 Nov 2022 16:50:26 +0000	[thread overview]
Message-ID: <20221118165025.GB4872@willie-the-truck> (raw)
In-Reply-To: <CAL_Jsq+WOjoPW0FDSa=B9-aCMwXC3tc5HUqokoVkKUucKgqanQ@mail.gmail.com>

On Thu, Nov 17, 2022 at 08:43:17AM -0600, Rob Herring wrote:
> On Fri, Nov 4, 2022 at 10:55 AM Rob Herring <robh@kernel.org> wrote:
> >
> > This series adds support for Arm SPEv1.2 which is part of the
> > Armv8.7/Armv9.2 architecture. There's 2 new features that affect the
> > kernel: a new event filter bit, branch 'not taken', and an inverted
> > event filter register.
> >
> > Since this support adds new registers and fields, first the SPE register
> > defines are converted to automatic generation.
> >
> > Note that the 'config3' addition in sysfs format files causes SPE to
> > break. A stable fix e552b7be12ed ("perf: Skip and warn on unknown format
> > 'configN' attrs") landed in v6.1-rc1.
> >
> > The perf tool side changes are available here[1].
> >
> > Tested on FVP.
> >
> > [1] https://lore.kernel.org/all/20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org/
> >
> > Signed-off-by: Rob Herring <robh@kernel.org>
> > ---
> > Changes in v3:
> > - Add some more missing SPE register fields and use Enums for some
> >   fields
> > - Use the new PMSIDR_EL1 register Enum defines in the SPE driver
> > - Link to v2: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v2-0-e37322d68ac0@kernel.org
> >
> > Changes in v2:
> > - Convert the SPE register defines to automatic generation
> > - Fixed access to SYS_PMSNEVFR_EL1 when not present
> > - Rebase on v6.1-rc1
> > - Link to v1: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v1-0-c75b8d92e692@kernel.org
> >
> > ---
> > Rob Herring (8):
> >       perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines
> >       arm64: Drop SYS_ from SPE register defines
> >       arm64/sysreg: Convert SPE registers to automatic generation
> >       perf: arm_spe: Drop BIT() and use FIELD_GET/PREP accessors
> >       perf: arm_spe: Use new PMSIDR_EL1 register enums
> >       perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event
> >       perf: Add perf_event_attr::config3
> >       perf: arm_spe: Add support for SPEv1.2 inverted event filtering
> >
> >  arch/arm64/include/asm/el2_setup.h |   6 +-
> >  arch/arm64/include/asm/sysreg.h    |  99 +++--------------------
> >  arch/arm64/kvm/debug.c             |   2 +-
> >  arch/arm64/kvm/hyp/nvhe/debug-sr.c |   2 +-
> >  arch/arm64/tools/sysreg            | 139 +++++++++++++++++++++++++++++++++
> >  drivers/perf/arm_spe_pmu.c         | 156 ++++++++++++++++++++++++-------------
> >  include/uapi/linux/perf_event.h    |   3 +
> >  7 files changed, 257 insertions(+), 150 deletions(-)
> 
> Will, any comments on this series?

Looks fine to me. Happy to queue it once the uapi change has been acked.

Will

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-11-18 16:50 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-04 15:55 [PATCH v3 0/8] perf: Arm SPEv1.2 support Rob Herring
2022-11-04 15:55 ` Rob Herring
2022-11-04 15:55 ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 1/8] perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 2/8] arm64: Drop SYS_ from SPE register defines Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 3/8] arm64/sysreg: Convert SPE registers to automatic generation Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-07 15:11   ` Mark Brown
2022-11-07 15:11     ` Mark Brown
2022-11-07 15:11     ` Mark Brown
2022-11-04 15:55 ` [PATCH v3 4/8] perf: arm_spe: Drop BIT() and use FIELD_GET/PREP accessors Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 5/8] perf: arm_spe: Use new PMSIDR_EL1 register enums Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 6/8] perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 7/8] perf: Add perf_event_attr::config3 Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-18 16:49   ` Will Deacon
2022-11-18 16:49     ` Will Deacon
2022-11-18 16:49     ` Will Deacon
2022-11-28 15:37     ` Rob Herring
2022-11-28 15:37       ` Rob Herring
2022-11-28 15:37       ` Rob Herring
2022-11-28 16:35       ` Alexander Shishkin
2022-11-28 16:35         ` Alexander Shishkin
2022-11-28 16:35         ` Alexander Shishkin
2022-11-28 17:15         ` Rob Herring
2022-11-28 17:15           ` Rob Herring
2022-11-28 17:15           ` Rob Herring
2022-12-06 16:28           ` Mark Rutland
2022-12-06 16:28             ` Mark Rutland
2022-12-06 16:28             ` Mark Rutland
2022-12-07 19:56             ` Rob Herring
2022-12-07 19:56               ` Rob Herring
2022-12-07 19:56               ` Rob Herring
2022-11-04 15:55 ` [PATCH v3 8/8] perf: arm_spe: Add support for SPEv1.2 inverted event filtering Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-04 15:55   ` Rob Herring
2022-11-07 19:48   ` Namhyung Kim
2022-11-07 19:48     ` Namhyung Kim
2022-11-07 19:48     ` Namhyung Kim
2022-11-08 13:12     ` Rob Herring
2022-11-08 13:12       ` Rob Herring
2022-11-08 13:12       ` Rob Herring
2022-11-17 14:43 ` [PATCH v3 0/8] perf: Arm SPEv1.2 support Rob Herring
2022-11-17 14:43   ` Rob Herring
2022-11-17 14:43   ` Rob Herring
2022-11-18 16:50   ` Will Deacon [this message]
2022-11-18 16:50     ` Will Deacon
2022-11-18 16:50     ` Will Deacon

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