From: Matt Ranostay <mranostay@ti.com> To: <nm@ti.com>, <afd@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <s-vadapalli@ti.com>, <r-gunasekaran@ti.com> Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v7 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Date: Tue, 22 Nov 2022 02:16:10 -0800 [thread overview] Message-ID: <20221122101616.770050-3-mranostay@ti.com> (raw) In-Reply-To: <20221122101616.770050-1-mranostay@ti.com> Add dt node for the single instance of WIZ (SERDES wrapper) and SERDES module shared by PCIe, eDP and USB. Signed-off-by: Matt Ranostay <mranostay@ti.com> --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index b4869bff4f22..2858ba589d54 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -5,6 +5,17 @@ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/phy/phy-ti.h> + +/ { + serdes_refclk: clock-cmnrefclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -38,6 +49,13 @@ usb_serdes_mux: mux-controller-0 { #mux-control-cells = <1>; mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ }; + + serdes_ln_ctrl: mux-controller-80 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */ + <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */ + }; }; gic500: interrupt-controller@1800000 { @@ -787,6 +805,42 @@ usb0: usb@6000000 { }; }; + serdes_wiz0: wiz@5060000 { + compatible = "ti,j721s2-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 365 0>, <&k3_clks 365 3>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x5060000 0x0 0x5060000 0x10000>; + + assigned-clocks = <&k3_clks 365 3>; + assigned-clock-parents = <&k3_clks 365 7>; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 365 3>, + <&k3_clks 365 3>, + <&k3_clks 365 3>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + }; + }; + main_mcan0: can@2701000 { compatible = "bosch,m_can"; reg = <0x00 0x02701000 0x00 0x200>, -- 2.38.GIT
WARNING: multiple messages have this Message-ID (diff)
From: Matt Ranostay <mranostay@ti.com> To: <nm@ti.com>, <afd@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <s-vadapalli@ti.com>, <r-gunasekaran@ti.com> Cc: <linux-arm-kernel@lists.infradead.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org> Subject: [PATCH v7 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Date: Tue, 22 Nov 2022 02:16:10 -0800 [thread overview] Message-ID: <20221122101616.770050-3-mranostay@ti.com> (raw) In-Reply-To: <20221122101616.770050-1-mranostay@ti.com> Add dt node for the single instance of WIZ (SERDES wrapper) and SERDES module shared by PCIe, eDP and USB. Signed-off-by: Matt Ranostay <mranostay@ti.com> --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 54 ++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index b4869bff4f22..2858ba589d54 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -5,6 +5,17 @@ * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ */ +#include <dt-bindings/phy/phy-cadence.h> +#include <dt-bindings/phy/phy-ti.h> + +/ { + serdes_refclk: clock-cmnrefclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + }; +}; + &cbass_main { msmc_ram: sram@70000000 { compatible = "mmio-sram"; @@ -38,6 +49,13 @@ usb_serdes_mux: mux-controller-0 { #mux-control-cells = <1>; mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ }; + + serdes_ln_ctrl: mux-controller-80 { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x80 0x3>, <0x84 0x3>, /* SERDES0 lane0/1 select */ + <0x88 0x3>, <0x8c 0x3>; /* SERDES0 lane2/3 select */ + }; }; gic500: interrupt-controller@1800000 { @@ -787,6 +805,42 @@ usb0: usb@6000000 { }; }; + serdes_wiz0: wiz@5060000 { + compatible = "ti,j721s2-wiz-10g"; + #address-cells = <1>; + #size-cells = <1>; + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 365 0>, <&k3_clks 365 3>, <&serdes_refclk>; + clock-names = "fck", "core_ref_clk", "ext_ref_clk"; + num-lanes = <4>; + #reset-cells = <1>; + #clock-cells = <1>; + ranges = <0x5060000 0x0 0x5060000 0x10000>; + + assigned-clocks = <&k3_clks 365 3>; + assigned-clock-parents = <&k3_clks 365 7>; + + serdes0: serdes@5060000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x05060000 0x00010000>; + reg-names = "torrent_phy"; + resets = <&serdes_wiz0 0>; + reset-names = "torrent_reset"; + clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PHY_EN_REFCLK>; + clock-names = "refclk", "phy_en_refclk"; + assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>, + <&serdes_wiz0 TI_WIZ_PLL1_REFCLK>, + <&serdes_wiz0 TI_WIZ_REFCLK_DIG>; + assigned-clock-parents = <&k3_clks 365 3>, + <&k3_clks 365 3>, + <&k3_clks 365 3>; + #address-cells = <1>; + #size-cells = <0>; + #clock-cells = <1>; + }; + }; + main_mcan0: can@2701000 { compatible = "bosch,m_can"; reg = <0x00 0x02701000 0x00 0x200>, -- 2.38.GIT _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-11-22 10:17 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-22 10:16 [PATCH v7 0/8] arm64: j721s2: Add support for additional IPs Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-22 10:16 ` [PATCH v7 1/8] arm64: dts: ti: k3-j721s2-main: Add support for USB Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2023-01-09 4:07 ` Vignesh Raghavendra 2023-01-09 4:07 ` Vignesh Raghavendra 2022-11-22 10:16 ` Matt Ranostay [this message] 2022-11-22 10:16 ` [PATCH v7 2/8] arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node Matt Ranostay 2022-11-23 10:35 ` Ravi Gunasekaran 2022-11-23 10:35 ` Ravi Gunasekaran 2023-01-09 4:09 ` Vignesh Raghavendra 2023-01-09 4:09 ` Vignesh Raghavendra 2022-11-22 10:16 ` [PATCH v7 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-22 14:03 ` Vaishnav Achath 2022-11-22 14:03 ` Vaishnav Achath 2022-11-29 17:34 ` Andrew Davis 2022-11-29 17:34 ` Andrew Davis 2023-01-09 4:10 ` Vignesh Raghavendra 2023-01-09 4:10 ` Vignesh Raghavendra 2022-11-22 10:16 ` [PATCH v7 4/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-22 10:16 ` [PATCH v7 5/8] arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-22 10:16 ` [PATCH v7 6/8] arm64: dts: ti: k3-j721s2: Add support for OSPI Flashes Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-22 14:04 ` Vaishnav Achath 2022-11-22 14:04 ` Vaishnav Achath 2022-11-22 10:16 ` [PATCH v7 7/8] arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay 2022-11-29 17:53 ` Andrew Davis 2022-11-29 17:53 ` Andrew Davis [not found] ` <20230117092331.GA3277247@desktop-3598> 2023-01-17 9:32 ` Siddharth Vadapalli 2023-01-17 9:32 ` Siddharth Vadapalli 2022-11-22 10:16 ` [PATCH v7 8/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Matt Ranostay 2022-11-22 10:16 ` Matt Ranostay
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