From: Abel Vesa <abel.vesa@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-phy@lists.infradead.org
Subject: [PATCH v3 4/8] phy: qcom-qmp: pcs-usb: Add v6 register offsets
Date: Thu, 26 Jan 2023 15:14:11 +0200 [thread overview]
Message-ID: <20230126131415.1453741-5-abel.vesa@linaro.org> (raw)
In-Reply-To: <20230126131415.1453741-1-abel.vesa@linaro.org>
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB.
Add the new PCS USB specific offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
The v2 version of this patch was here:
https://lore.kernel.org/all/20230126124651.1362533-5-abel.vesa@linaro.org/
Changes since v2:
* none
Changes since v1:
* split all the offsets into separate patches, like Vinod suggested
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 1 +
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 31 +++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 521ea3ce6b83..14d12d198d87 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -26,6 +26,7 @@
#include "phy-qcom-qmp-pcs-misc-v3.h"
#include "phy-qcom-qmp-pcs-usb-v4.h"
#include "phy-qcom-qmp-pcs-usb-v5.h"
+#include "phy-qcom-qmp-pcs-usb-v6.h"
/* QPHY_SW_RESET bit */
#define SW_RESET BIT(0)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
new file mode 100644
index 000000000000..9510e63ba9d8
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef QCOM_PHY_QMP_PCS_USB_V6_H_
+#define QCOM_PHY_QMP_PCS_USB_V6_H_
+
+/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
+#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
+#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
+#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
+#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+
+#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
+#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
+#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
+#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
+
+#endif
--
2.34.1
WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@linaro.org>
To: Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-phy@lists.infradead.org
Subject: [PATCH v3 4/8] phy: qcom-qmp: pcs-usb: Add v6 register offsets
Date: Thu, 26 Jan 2023 15:14:11 +0200 [thread overview]
Message-ID: <20230126131415.1453741-5-abel.vesa@linaro.org> (raw)
In-Reply-To: <20230126131415.1453741-1-abel.vesa@linaro.org>
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB.
Add the new PCS USB specific offsets in a dedicated header file.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
The v2 version of this patch was here:
https://lore.kernel.org/all/20230126124651.1362533-5-abel.vesa@linaro.org/
Changes since v2:
* none
Changes since v1:
* split all the offsets into separate patches, like Vinod suggested
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 1 +
.../phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 31 +++++++++++++++++++
2 files changed, 32 insertions(+)
create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 521ea3ce6b83..14d12d198d87 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -26,6 +26,7 @@
#include "phy-qcom-qmp-pcs-misc-v3.h"
#include "phy-qcom-qmp-pcs-usb-v4.h"
#include "phy-qcom-qmp-pcs-usb-v5.h"
+#include "phy-qcom-qmp-pcs-usb-v6.h"
/* QPHY_SW_RESET bit */
#define SW_RESET BIT(0)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
new file mode 100644
index 000000000000..9510e63ba9d8
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (c) 2022, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef QCOM_PHY_QMP_PCS_USB_V6_H_
+#define QCOM_PHY_QMP_PCS_USB_V6_H_
+
+/* Only for QMP V6 PHY - USB3 have different offsets than V5 */
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG1 0xc4
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG2 0xc8
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3 0xcc
+#define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6 0xd8
+#define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1 0xdc
+#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1 0x90
+#define QPHY_USB_V6_PCS_RX_SIGDET_LVL 0x188
+#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L 0x190
+#define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H 0x194
+#define QPHY_USB_V6_PCS_CDR_RESET_TIME 0x1b0
+#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG1 0x1c0
+#define QPHY_USB_V6_PCS_ALIGN_DETECT_CONFIG2 0x1c4
+#define QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG 0x1d0
+#define QPHY_USB_V6_PCS_EQ_CONFIG1 0x1dc
+#define QPHY_USB_V6_PCS_EQ_CONFIG5 0x1ec
+
+#define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL 0x18
+#define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2 0x3c
+#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L 0x40
+#define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H 0x44
+
+#endif
--
2.34.1
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-01-26 13:14 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 13:14 [PATCH v3 0/8] sm8550: Add USB HC and PHYs support Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 1/8] dt-bindings: phy: Add qcom,snps-eusb2-phy schema file Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 15:39 ` Rob Herring
2023-01-26 15:39 ` Rob Herring
2023-01-27 21:19 ` Rob Herring
2023-01-27 21:19 ` Rob Herring
2023-01-26 13:14 ` [PATCH v3 2/8] phy: qcom: Add QCOM SNPS eUSB2 driver Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 3/8] dt-bindings: phy: qcom,qmp-usb: Document SM8550 compatible Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-30 18:41 ` Rob Herring
2023-01-30 18:41 ` Rob Herring
2023-01-26 13:14 ` Abel Vesa [this message]
2023-01-26 13:14 ` [PATCH v3 4/8] phy: qcom-qmp: pcs-usb: Add v6 register offsets Abel Vesa
2023-01-26 13:14 ` [PATCH v3 5/8] phy: qcom-qmp: Add v6 DP " Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 6/8] phy: qcom-qmp-combo: Add support for SM8550 Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:27 ` Neil Armstrong
2023-01-26 13:27 ` Neil Armstrong
2023-01-26 13:14 ` [PATCH v3 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-27 11:49 ` Krzysztof Kozlowski
2023-01-27 11:49 ` Krzysztof Kozlowski
2023-01-26 13:14 ` [PATCH v3 8/8] arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes Abel Vesa
2023-01-26 13:14 ` Abel Vesa
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230126131415.1453741-5-abel.vesa@linaro.org \
--to=abel.vesa@linaro.org \
--cc=agross@kernel.org \
--cc=andersson@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=kishon@kernel.org \
--cc=konrad.dybcio@linaro.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=vkoul@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.