From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes
Date: Fri, 27 Jan 2023 12:49:33 +0100 [thread overview]
Message-ID: <9f4666db-9b0b-77d4-e02b-708c2a1ebb4e@linaro.org> (raw)
In-Reply-To: <20230126131415.1453741-8-abel.vesa@linaro.org>
On 26/01/2023 14:14, Abel Vesa wrote:
> Add USB host controller and PHY nodes.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
(...)
> + usb_1: usb@a6f8800 {
> + compatible = "qcom,sm8550-dwc3", "qcom,dwc3";
> + reg = <0x0 0x0a6f8800 0x0 0x400>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
> + <&gcc GCC_USB30_PRIM_MASTER_CLK>,
> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
> + <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
> + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
> + <&rpmhcc TCSR_USB3_CLKREF_EN>;
> + clock-names = "cfg_noc",
> + "core",
> + "iface",
> + "sleep",
> + "mock_utmi",
> + "xo";
> +
> + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
> + <&gcc GCC_USB30_PRIM_MASTER_CLK>;
> + assigned-clock-rates = <19200000>, <200000000>;
> +
> + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 15 IRQ_TYPE_EDGE_RISING>,
> + <&pdc 14 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "hs_phy_irq",
> + "ss_phy_irq",
> + "dm_hs_phy_irq",
> + "dp_hs_phy_irq";
> +
> + power-domains = <&gcc USB30_PRIM_GDSC>;
> + required-opps = <&rpmhpd_opp_nom>;
This is not accepted, so far. Can we drop it?
Or revive:
https://lore.kernel.org/all/YXcBK7zqny0s4gd4@ripper/
Best regards,
Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Abel Vesa <abel.vesa@linaro.org>, Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
"vkoul@kernel.org" <vkoul@kernel.org>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-phy@lists.infradead.org
Subject: Re: [PATCH v3 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes
Date: Fri, 27 Jan 2023 12:49:33 +0100 [thread overview]
Message-ID: <9f4666db-9b0b-77d4-e02b-708c2a1ebb4e@linaro.org> (raw)
In-Reply-To: <20230126131415.1453741-8-abel.vesa@linaro.org>
On 26/01/2023 14:14, Abel Vesa wrote:
> Add USB host controller and PHY nodes.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
(...)
> + usb_1: usb@a6f8800 {
> + compatible = "qcom,sm8550-dwc3", "qcom,dwc3";
> + reg = <0x0 0x0a6f8800 0x0 0x400>;
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
> + <&gcc GCC_USB30_PRIM_MASTER_CLK>,
> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
> + <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
> + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
> + <&rpmhcc TCSR_USB3_CLKREF_EN>;
> + clock-names = "cfg_noc",
> + "core",
> + "iface",
> + "sleep",
> + "mock_utmi",
> + "xo";
> +
> + assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
> + <&gcc GCC_USB30_PRIM_MASTER_CLK>;
> + assigned-clock-rates = <19200000>, <200000000>;
> +
> + interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
> + <&pdc 15 IRQ_TYPE_EDGE_RISING>,
> + <&pdc 14 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "hs_phy_irq",
> + "ss_phy_irq",
> + "dm_hs_phy_irq",
> + "dp_hs_phy_irq";
> +
> + power-domains = <&gcc USB30_PRIM_GDSC>;
> + required-opps = <&rpmhpd_opp_nom>;
This is not accepted, so far. Can we drop it?
Or revive:
https://lore.kernel.org/all/YXcBK7zqny0s4gd4@ripper/
Best regards,
Krzysztof
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-01-27 12:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-26 13:14 [PATCH v3 0/8] sm8550: Add USB HC and PHYs support Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 1/8] dt-bindings: phy: Add qcom,snps-eusb2-phy schema file Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 15:39 ` Rob Herring
2023-01-26 15:39 ` Rob Herring
2023-01-27 21:19 ` Rob Herring
2023-01-27 21:19 ` Rob Herring
2023-01-26 13:14 ` [PATCH v3 2/8] phy: qcom: Add QCOM SNPS eUSB2 driver Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 3/8] dt-bindings: phy: qcom,qmp-usb: Document SM8550 compatible Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-30 18:41 ` Rob Herring
2023-01-30 18:41 ` Rob Herring
2023-01-26 13:14 ` [PATCH v3 4/8] phy: qcom-qmp: pcs-usb: Add v6 register offsets Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 5/8] phy: qcom-qmp: Add v6 DP " Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:14 ` [PATCH v3 6/8] phy: qcom-qmp-combo: Add support for SM8550 Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-26 13:27 ` Neil Armstrong
2023-01-26 13:27 ` Neil Armstrong
2023-01-26 13:14 ` [PATCH v3 7/8] arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes Abel Vesa
2023-01-26 13:14 ` Abel Vesa
2023-01-27 11:49 ` Krzysztof Kozlowski [this message]
2023-01-27 11:49 ` Krzysztof Kozlowski
2023-01-26 13:14 ` [PATCH v3 8/8] arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes Abel Vesa
2023-01-26 13:14 ` Abel Vesa
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