From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com
Subject: Re: [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand timing default
Date: Fri, 9 Jun 2023 10:50:23 +0200 [thread overview]
Message-ID: <20230609105023.5b629705@xps-13> (raw)
In-Reply-To: <f8a10a00-c3e4-9749-789d-39fba7944646@gmail.com>
Hi Johan,
jbx6244@gmail.com wrote on Thu, 8 Jun 2023 18:30:40 +0200:
> Somehow not all NAND chips give a valid timing setting with the
> nand_get_sdr_timings() function.
nand_get_sdr_timings() is a core function and is not particularly
clever. All chips are supposed to support SDR mode 0 so if you chip
does not advertises that the chip is broken, not the controller. This
must be fixed in the chip manufacturer driver, not in the controller
driver.
> Don't consider it as an error,
> but fall back to the default value in order to continue to use
> the driver.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> drivers/mtd/nand/raw/rockchip-nand-controller.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> index f56430f6c..e39431cfa 100644
> --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
> +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> @@ -429,8 +429,10 @@ static int rk_nfc_setup_interface(struct nand_chip *chip, int target,
> return 0;
>
> timings = nand_get_sdr_timings(conf);
> - if (IS_ERR(timings))
> - return -EOPNOTSUPP;
> + if (IS_ERR(timings)) {
> + rknand->timing = 0x1081;
This is way to magical anyway :)
> + return 0;
> + }
>
> if (IS_ERR(nfc->nfc_clk))
> rate = clk_get_rate(nfc->ahb_clk);
> --
> 2.30.2
>
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com
Subject: Re: [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand timing default
Date: Fri, 9 Jun 2023 10:50:23 +0200 [thread overview]
Message-ID: <20230609105023.5b629705@xps-13> (raw)
In-Reply-To: <f8a10a00-c3e4-9749-789d-39fba7944646@gmail.com>
Hi Johan,
jbx6244@gmail.com wrote on Thu, 8 Jun 2023 18:30:40 +0200:
> Somehow not all NAND chips give a valid timing setting with the
> nand_get_sdr_timings() function.
nand_get_sdr_timings() is a core function and is not particularly
clever. All chips are supposed to support SDR mode 0 so if you chip
does not advertises that the chip is broken, not the controller. This
must be fixed in the chip manufacturer driver, not in the controller
driver.
> Don't consider it as an error,
> but fall back to the default value in order to continue to use
> the driver.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> drivers/mtd/nand/raw/rockchip-nand-controller.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> index f56430f6c..e39431cfa 100644
> --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
> +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> @@ -429,8 +429,10 @@ static int rk_nfc_setup_interface(struct nand_chip *chip, int target,
> return 0;
>
> timings = nand_get_sdr_timings(conf);
> - if (IS_ERR(timings))
> - return -EOPNOTSUPP;
> + if (IS_ERR(timings)) {
> + rknand->timing = 0x1081;
This is way to magical anyway :)
> + return 0;
> + }
>
> if (IS_ERR(nfc->nfc_clk))
> rate = clk_get_rate(nfc->ahb_clk);
> --
> 2.30.2
>
Thanks,
Miquèl
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com
Subject: Re: [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand timing default
Date: Fri, 9 Jun 2023 10:50:23 +0200 [thread overview]
Message-ID: <20230609105023.5b629705@xps-13> (raw)
In-Reply-To: <f8a10a00-c3e4-9749-789d-39fba7944646@gmail.com>
Hi Johan,
jbx6244@gmail.com wrote on Thu, 8 Jun 2023 18:30:40 +0200:
> Somehow not all NAND chips give a valid timing setting with the
> nand_get_sdr_timings() function.
nand_get_sdr_timings() is a core function and is not particularly
clever. All chips are supposed to support SDR mode 0 so if you chip
does not advertises that the chip is broken, not the controller. This
must be fixed in the chip manufacturer driver, not in the controller
driver.
> Don't consider it as an error,
> but fall back to the default value in order to continue to use
> the driver.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> drivers/mtd/nand/raw/rockchip-nand-controller.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> index f56430f6c..e39431cfa 100644
> --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
> +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> @@ -429,8 +429,10 @@ static int rk_nfc_setup_interface(struct nand_chip *chip, int target,
> return 0;
>
> timings = nand_get_sdr_timings(conf);
> - if (IS_ERR(timings))
> - return -EOPNOTSUPP;
> + if (IS_ERR(timings)) {
> + rknand->timing = 0x1081;
This is way to magical anyway :)
> + return 0;
> + }
>
> if (IS_ERR(nfc->nfc_clk))
> rate = clk_get_rate(nfc->ahb_clk);
> --
> 2.30.2
>
Thanks,
Miquèl
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Johan Jonker <jbx6244@gmail.com>
Cc: richard@nod.at, vigneshr@ti.com, heiko@sntech.de,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, yifeng.zhao@rock-chips.com
Subject: Re: [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand timing default
Date: Fri, 9 Jun 2023 10:50:23 +0200 [thread overview]
Message-ID: <20230609105023.5b629705@xps-13> (raw)
In-Reply-To: <f8a10a00-c3e4-9749-789d-39fba7944646@gmail.com>
Hi Johan,
jbx6244@gmail.com wrote on Thu, 8 Jun 2023 18:30:40 +0200:
> Somehow not all NAND chips give a valid timing setting with the
> nand_get_sdr_timings() function.
nand_get_sdr_timings() is a core function and is not particularly
clever. All chips are supposed to support SDR mode 0 so if you chip
does not advertises that the chip is broken, not the controller. This
must be fixed in the chip manufacturer driver, not in the controller
driver.
> Don't consider it as an error,
> but fall back to the default value in order to continue to use
> the driver.
>
> Signed-off-by: Johan Jonker <jbx6244@gmail.com>
> ---
> drivers/mtd/nand/raw/rockchip-nand-controller.c | 6 ++++--
> 1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mtd/nand/raw/rockchip-nand-controller.c b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> index f56430f6c..e39431cfa 100644
> --- a/drivers/mtd/nand/raw/rockchip-nand-controller.c
> +++ b/drivers/mtd/nand/raw/rockchip-nand-controller.c
> @@ -429,8 +429,10 @@ static int rk_nfc_setup_interface(struct nand_chip *chip, int target,
> return 0;
>
> timings = nand_get_sdr_timings(conf);
> - if (IS_ERR(timings))
> - return -EOPNOTSUPP;
> + if (IS_ERR(timings)) {
> + rknand->timing = 0x1081;
This is way to magical anyway :)
> + return 0;
> + }
>
> if (IS_ERR(nfc->nfc_clk))
> rate = clk_get_rate(nfc->ahb_clk);
> --
> 2.30.2
>
Thanks,
Miquèl
next prev parent reply other threads:[~2023-06-09 8:50 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-08 16:28 [PATCH v1 0/5] Fixes for Rockchip NAND controller driver Johan Jonker
2023-06-08 16:28 ` Johan Jonker
2023-06-08 16:28 ` Johan Jonker
2023-06-08 16:28 ` Johan Jonker
2023-06-08 16:30 ` [PATCH v1 1/5] mtd: nand: raw: rockchip-nand-controller: copy hwecc PA data to oob_poi buffer Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` [PATCH v1 2/5] mtd: nand: raw: rockchip-nand-controller: add skipbbt option Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-09 8:44 ` Miquel Raynal
2023-06-09 8:44 ` Miquel Raynal
2023-06-09 8:44 ` Miquel Raynal
2023-06-09 8:44 ` Miquel Raynal
2023-06-10 22:13 ` Johan Jonker
2023-06-10 22:13 ` Johan Jonker
2023-06-10 22:13 ` Johan Jonker
2023-06-08 16:30 ` [PATCH v1 3/5] mtd: nand: raw: rockchip-nand-controller: fix nand timing default Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-09 8:50 ` Miquel Raynal [this message]
2023-06-09 8:50 ` Miquel Raynal
2023-06-09 8:50 ` Miquel Raynal
2023-06-09 8:50 ` Miquel Raynal
2023-06-08 16:30 ` [PATCH v1 4/5] mtd: nand: raw: rockchip-nand-controller: fix oobfree offset and description Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:30 ` Johan Jonker
2023-06-08 16:31 ` [PATCH v1 5/5] mtd: nand: add support for the Sandisk SDTNQGAMA chip Johan Jonker
2023-06-08 16:31 ` Johan Jonker
2023-06-08 16:31 ` Johan Jonker
2023-06-08 16:31 ` Johan Jonker
2023-06-09 8:54 ` Miquel Raynal
2023-06-09 8:54 ` Miquel Raynal
2023-06-09 8:54 ` Miquel Raynal
2023-06-09 8:54 ` Miquel Raynal
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