From: Andrew Jones <ajones@ventanamicro.com>
To: Haibo Xu <haibo1.xu@intel.com>
Cc: xiaobo55x@gmail.com, "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>, wchen <waylingii@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>,
"Thomas Huth" <thuth@redhat.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support
Date: Mon, 4 Sep 2023 15:46:11 +0200 [thread overview]
Message-ID: <20230904-c4d2ea8fcfdea6e6722332b2@orel> (raw)
In-Reply-To: <ff41e98a062e0fbb5c2d8dc26d9e4e02c4ce3ea8.1693659382.git.haibo1.xu@intel.com>
On Sat, Sep 02, 2023 at 08:59:27PM +0800, Haibo Xu wrote:
> Add the infrastructure for guest exception handling in riscv selftests.
> Customized handlers can be enabled by vm_install_exception_handler(vector)
> or vm_install_interrupt_handler().
>
> The code is inspired from that of x86/arm64.
>
> Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> ---
> tools/testing/selftests/kvm/Makefile | 1 +
> .../selftests/kvm/include/riscv/processor.h | 43 ++++++++
> .../selftests/kvm/lib/riscv/handlers.S | 101 ++++++++++++++++++
> .../selftests/kvm/lib/riscv/processor.c | 69 ++++++++++++
> 4 files changed, 214 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Haibo Xu <haibo1.xu@intel.com>
Cc: xiaobo55x@gmail.com, "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>, wchen <waylingii@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>,
"Thomas Huth" <thuth@redhat.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support
Date: Mon, 4 Sep 2023 15:46:11 +0200 [thread overview]
Message-ID: <20230904-c4d2ea8fcfdea6e6722332b2@orel> (raw)
In-Reply-To: <ff41e98a062e0fbb5c2d8dc26d9e4e02c4ce3ea8.1693659382.git.haibo1.xu@intel.com>
On Sat, Sep 02, 2023 at 08:59:27PM +0800, Haibo Xu wrote:
> Add the infrastructure for guest exception handling in riscv selftests.
> Customized handlers can be enabled by vm_install_exception_handler(vector)
> or vm_install_interrupt_handler().
>
> The code is inspired from that of x86/arm64.
>
> Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> ---
> tools/testing/selftests/kvm/Makefile | 1 +
> .../selftests/kvm/include/riscv/processor.h | 43 ++++++++
> .../selftests/kvm/lib/riscv/handlers.S | 101 ++++++++++++++++++
> .../selftests/kvm/lib/riscv/processor.c | 69 ++++++++++++
> 4 files changed, 214 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Andrew Jones <ajones@ventanamicro.com>
To: Haibo Xu <haibo1.xu@intel.com>
Cc: xiaobo55x@gmail.com, "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>, wchen <waylingii@gmail.com>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>,
"Thomas Huth" <thuth@redhat.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support
Date: Mon, 4 Sep 2023 15:46:11 +0200 [thread overview]
Message-ID: <20230904-c4d2ea8fcfdea6e6722332b2@orel> (raw)
In-Reply-To: <ff41e98a062e0fbb5c2d8dc26d9e4e02c4ce3ea8.1693659382.git.haibo1.xu@intel.com>
On Sat, Sep 02, 2023 at 08:59:27PM +0800, Haibo Xu wrote:
> Add the infrastructure for guest exception handling in riscv selftests.
> Customized handlers can be enabled by vm_install_exception_handler(vector)
> or vm_install_interrupt_handler().
>
> The code is inspired from that of x86/arm64.
>
> Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> ---
> tools/testing/selftests/kvm/Makefile | 1 +
> .../selftests/kvm/include/riscv/processor.h | 43 ++++++++
> .../selftests/kvm/lib/riscv/handlers.S | 101 ++++++++++++++++++
> .../selftests/kvm/lib/riscv/processor.c | 69 ++++++++++++
> 4 files changed, 214 insertions(+)
> create mode 100644 tools/testing/selftests/kvm/lib/riscv/handlers.S
>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-04 13:46 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-02 12:59 [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 1/8] KVM: selftests: Unify the codes for guest exception handling Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 11:15 ` Andrew Jones
2023-09-04 11:15 ` Andrew Jones
2023-09-04 11:15 ` Andrew Jones
2023-09-06 2:15 ` Haibo Xu
2023-09-06 2:15 ` Haibo Xu
2023-09-06 2:15 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 2/8] KVM: arm64: selftest: Split arch_timer test code Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:24 ` Andrew Jones
2023-09-04 13:24 ` Andrew Jones
2023-09-04 13:24 ` Andrew Jones
2023-09-06 2:14 ` Haibo Xu
2023-09-06 2:14 ` Haibo Xu
2023-09-06 2:14 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 7:01 ` Andrew Jones
2023-09-06 7:01 ` Andrew Jones
2023-09-06 7:01 ` Andrew Jones
2023-09-06 9:01 ` Haibo Xu
2023-09-06 9:01 ` Haibo Xu
2023-09-06 9:01 ` Haibo Xu
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:58 ` Haibo Xu
2023-09-06 6:58 ` Haibo Xu
2023-09-06 6:58 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 3/8] tools: riscv: Add header file csr.h Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-06 6:35 ` Haibo Xu
2023-09-06 6:35 ` Haibo Xu
2023-09-06 6:35 ` Haibo Xu
2023-09-06 7:13 ` Andrew Jones
2023-09-06 7:13 ` Andrew Jones
2023-09-06 7:13 ` Andrew Jones
2023-09-06 9:09 ` Haibo Xu
2023-09-06 9:09 ` Haibo Xu
2023-09-06 9:09 ` Haibo Xu
2023-09-06 13:47 ` Andrew Jones
2023-09-06 13:47 ` Andrew Jones
2023-09-06 13:47 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:31 ` Andrew Jones
2023-09-04 13:31 ` Andrew Jones
2023-09-04 13:31 ` Andrew Jones
2023-09-06 6:56 ` Haibo Xu
2023-09-06 6:56 ` Haibo Xu
2023-09-06 6:56 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:46 ` Andrew Jones [this message]
2023-09-04 13:46 ` Andrew Jones
2023-09-04 13:46 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 6/8] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:48 ` Andrew Jones
2023-09-04 13:48 ` Andrew Jones
2023-09-04 13:48 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 7/8] KVM: riscv: selftest: Change vcpu_has_ext to a common function Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 14:04 ` Andrew Jones
2023-09-04 14:04 ` Andrew Jones
2023-09-04 14:04 ` Andrew Jones
2023-09-06 10:10 ` Haibo Xu
2023-09-06 10:10 ` Haibo Xu
2023-09-06 10:10 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:18 ` Haibo Xu
2023-09-07 9:18 ` Haibo Xu
2023-09-07 9:18 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 8/8] KVM: riscv: selftests: Add sstc timer test Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 14:58 ` Andrew Jones
2023-09-04 14:58 ` Andrew Jones
2023-09-04 14:58 ` Andrew Jones
2023-09-07 4:20 ` Haibo Xu
2023-09-07 4:20 ` Haibo Xu
2023-09-07 4:20 ` Haibo Xu
2023-09-07 19:01 ` Andrew Jones
2023-09-07 19:01 ` Andrew Jones
2023-09-07 19:01 ` Andrew Jones
2023-09-08 1:19 ` Haibo Xu
2023-09-08 1:19 ` Haibo Xu
2023-09-08 1:19 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-05 10:36 ` [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Andrew Jones
2023-09-05 10:36 ` Andrew Jones
2023-09-05 10:36 ` Andrew Jones
2023-09-06 1:23 ` Haibo Xu
2023-09-06 1:23 ` Haibo Xu
2023-09-06 1:23 ` Haibo Xu
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