From: Haibo Xu <xiaobo55x@gmail.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: "Haibo Xu" <haibo1.xu@intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
wchen <waylingii@gmail.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Jim Mattson" <jmattson@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h
Date: Wed, 6 Sep 2023 14:56:54 +0800 [thread overview]
Message-ID: <CAJve8om7Rmp-gbyT7DfHQVPrpkrgA95pbLVrTh=-S2HegkuXpQ@mail.gmail.com> (raw)
In-Reply-To: <20230904-d35320b23119ee97737e8a74@orel>
On Mon, Sep 4, 2023 at 9:31 PM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Sat, Sep 02, 2023 at 08:59:26PM +0800, Haibo Xu wrote:
> > Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> > ---
> > tools/testing/selftests/kvm/include/riscv/processor.h | 5 +----
> > 1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
> > index 5b62a3d2aa9b..6810c887fadc 100644
> > --- a/tools/testing/selftests/kvm/include/riscv/processor.h
> > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h
> > @@ -8,6 +8,7 @@
> > #define SELFTEST_KVM_PROCESSOR_H
> >
> > #include "kvm_util.h"
> > +#include <asm/csr.h>
> > #include <linux/stringify.h>
> >
> > static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > @@ -95,12 +96,8 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > #define PGTBL_PAGE_SIZE PGTBL_L0_BLOCK_SIZE
> > #define PGTBL_PAGE_SIZE_SHIFT PGTBL_L0_BLOCK_SHIFT
> >
> > -#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
> > #define SATP_MODE_39 _AC(0x8000000000000000, UL)
> > #define SATP_MODE_48 _AC(0x9000000000000000, UL)
>
> SATP_MODE_39/48 are also in csr.h
>
Good catch! These 2 should also be removed. Will fix it in the next version.
> > -#define SATP_ASID_BITS 16
> > -#define SATP_ASID_SHIFT 44
> > -#define SATP_ASID_MASK _AC(0xFFFF, UL)
> >
> > #define SBI_EXT_EXPERIMENTAL_START 0x08000000
> > #define SBI_EXT_EXPERIMENTAL_END 0x08FFFFFF
> > --
> > 2.34.1
> >
>
> Thanks,
> drew
WARNING: multiple messages have this Message-ID (diff)
From: Haibo Xu <xiaobo55x@gmail.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: "Haibo Xu" <haibo1.xu@intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
wchen <waylingii@gmail.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Jim Mattson" <jmattson@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h
Date: Wed, 6 Sep 2023 14:56:54 +0800 [thread overview]
Message-ID: <CAJve8om7Rmp-gbyT7DfHQVPrpkrgA95pbLVrTh=-S2HegkuXpQ@mail.gmail.com> (raw)
In-Reply-To: <20230904-d35320b23119ee97737e8a74@orel>
On Mon, Sep 4, 2023 at 9:31 PM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Sat, Sep 02, 2023 at 08:59:26PM +0800, Haibo Xu wrote:
> > Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> > ---
> > tools/testing/selftests/kvm/include/riscv/processor.h | 5 +----
> > 1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
> > index 5b62a3d2aa9b..6810c887fadc 100644
> > --- a/tools/testing/selftests/kvm/include/riscv/processor.h
> > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h
> > @@ -8,6 +8,7 @@
> > #define SELFTEST_KVM_PROCESSOR_H
> >
> > #include "kvm_util.h"
> > +#include <asm/csr.h>
> > #include <linux/stringify.h>
> >
> > static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > @@ -95,12 +96,8 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > #define PGTBL_PAGE_SIZE PGTBL_L0_BLOCK_SIZE
> > #define PGTBL_PAGE_SIZE_SHIFT PGTBL_L0_BLOCK_SHIFT
> >
> > -#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
> > #define SATP_MODE_39 _AC(0x8000000000000000, UL)
> > #define SATP_MODE_48 _AC(0x9000000000000000, UL)
>
> SATP_MODE_39/48 are also in csr.h
>
Good catch! These 2 should also be removed. Will fix it in the next version.
> > -#define SATP_ASID_BITS 16
> > -#define SATP_ASID_SHIFT 44
> > -#define SATP_ASID_MASK _AC(0xFFFF, UL)
> >
> > #define SBI_EXT_EXPERIMENTAL_START 0x08000000
> > #define SBI_EXT_EXPERIMENTAL_END 0x08FFFFFF
> > --
> > 2.34.1
> >
>
> Thanks,
> drew
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Haibo Xu <xiaobo55x@gmail.com>
To: Andrew Jones <ajones@ventanamicro.com>
Cc: "Haibo Xu" <haibo1.xu@intel.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Shuah Khan" <shuah@kernel.org>, "Marc Zyngier" <maz@kernel.org>,
"Oliver Upton" <oliver.upton@linux.dev>,
"James Morse" <james.morse@arm.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Zenghui Yu" <yuzenghui@huawei.com>,
"Anup Patel" <anup@brainfault.org>,
"Atish Patra" <atishp@atishpatra.org>,
"Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor.dooley@microchip.com>,
wchen <waylingii@gmail.com>,
"Greentime Hu" <greentime.hu@sifive.com>,
"Sean Christopherson" <seanjc@google.com>,
"Ricardo Koller" <ricarkol@google.com>,
"Vishal Annapurve" <vannapurve@google.com>,
"Vitaly Kuznetsov" <vkuznets@redhat.com>,
"Aaron Lewis" <aaronlewis@google.com>,
"David Matlack" <dmatlack@google.com>,
"Mingwei Zhang" <mizhang@google.com>,
"Ackerley Tng" <ackerleytng@google.com>,
"Jim Mattson" <jmattson@google.com>,
"Vipin Sharma" <vipinsh@google.com>,
"Maxim Levitsky" <mlevitsk@redhat.com>,
"Peter Gonda" <pgonda@google.com>, "Like Xu" <likexu@tencent.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Thomas Huth" <thuth@redhat.com>,
"David Woodhouse" <dwmw@amazon.co.uk>,
"Michal Luczaj" <mhal@rbox.co>,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
kvm@vger.kernel.org, linux-kselftest@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h
Date: Wed, 6 Sep 2023 14:56:54 +0800 [thread overview]
Message-ID: <CAJve8om7Rmp-gbyT7DfHQVPrpkrgA95pbLVrTh=-S2HegkuXpQ@mail.gmail.com> (raw)
In-Reply-To: <20230904-d35320b23119ee97737e8a74@orel>
On Mon, Sep 4, 2023 at 9:31 PM Andrew Jones <ajones@ventanamicro.com> wrote:
>
> On Sat, Sep 02, 2023 at 08:59:26PM +0800, Haibo Xu wrote:
> > Signed-off-by: Haibo Xu <haibo1.xu@intel.com>
> > ---
> > tools/testing/selftests/kvm/include/riscv/processor.h | 5 +----
> > 1 file changed, 1 insertion(+), 4 deletions(-)
> >
> > diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h
> > index 5b62a3d2aa9b..6810c887fadc 100644
> > --- a/tools/testing/selftests/kvm/include/riscv/processor.h
> > +++ b/tools/testing/selftests/kvm/include/riscv/processor.h
> > @@ -8,6 +8,7 @@
> > #define SELFTEST_KVM_PROCESSOR_H
> >
> > #include "kvm_util.h"
> > +#include <asm/csr.h>
> > #include <linux/stringify.h>
> >
> > static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > @@ -95,12 +96,8 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t idx,
> > #define PGTBL_PAGE_SIZE PGTBL_L0_BLOCK_SIZE
> > #define PGTBL_PAGE_SIZE_SHIFT PGTBL_L0_BLOCK_SHIFT
> >
> > -#define SATP_PPN _AC(0x00000FFFFFFFFFFF, UL)
> > #define SATP_MODE_39 _AC(0x8000000000000000, UL)
> > #define SATP_MODE_48 _AC(0x9000000000000000, UL)
>
> SATP_MODE_39/48 are also in csr.h
>
Good catch! These 2 should also be removed. Will fix it in the next version.
> > -#define SATP_ASID_BITS 16
> > -#define SATP_ASID_SHIFT 44
> > -#define SATP_ASID_MASK _AC(0xFFFF, UL)
> >
> > #define SBI_EXT_EXPERIMENTAL_START 0x08000000
> > #define SBI_EXT_EXPERIMENTAL_END 0x08FFFFFF
> > --
> > 2.34.1
> >
>
> Thanks,
> drew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-06 6:57 UTC|newest]
Thread overview: 129+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-02 12:59 [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 1/8] KVM: selftests: Unify the codes for guest exception handling Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 11:15 ` Andrew Jones
2023-09-04 11:15 ` Andrew Jones
2023-09-04 11:15 ` Andrew Jones
2023-09-06 2:15 ` Haibo Xu
2023-09-06 2:15 ` Haibo Xu
2023-09-06 2:15 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 2/8] KVM: arm64: selftest: Split arch_timer test code Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:24 ` Andrew Jones
2023-09-04 13:24 ` Andrew Jones
2023-09-04 13:24 ` Andrew Jones
2023-09-06 2:14 ` Haibo Xu
2023-09-06 2:14 ` Haibo Xu
2023-09-06 2:14 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 3:44 ` Haibo Xu
2023-09-06 7:01 ` Andrew Jones
2023-09-06 7:01 ` Andrew Jones
2023-09-06 7:01 ` Andrew Jones
2023-09-06 9:01 ` Haibo Xu
2023-09-06 9:01 ` Haibo Xu
2023-09-06 9:01 ` Haibo Xu
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:41 ` Andrew Jones
2023-09-06 6:58 ` Haibo Xu
2023-09-06 6:58 ` Haibo Xu
2023-09-06 6:58 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 3/8] tools: riscv: Add header file csr.h Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:26 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-04 13:33 ` Andrew Jones
2023-09-06 6:35 ` Haibo Xu
2023-09-06 6:35 ` Haibo Xu
2023-09-06 6:35 ` Haibo Xu
2023-09-06 7:13 ` Andrew Jones
2023-09-06 7:13 ` Andrew Jones
2023-09-06 7:13 ` Andrew Jones
2023-09-06 9:09 ` Haibo Xu
2023-09-06 9:09 ` Haibo Xu
2023-09-06 9:09 ` Haibo Xu
2023-09-06 13:47 ` Andrew Jones
2023-09-06 13:47 ` Andrew Jones
2023-09-06 13:47 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 4/8] KVM: riscv: selftests: Switch to use macro from csr.h Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:31 ` Andrew Jones
2023-09-04 13:31 ` Andrew Jones
2023-09-04 13:31 ` Andrew Jones
2023-09-06 6:56 ` Haibo Xu [this message]
2023-09-06 6:56 ` Haibo Xu
2023-09-06 6:56 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 5/8] KVM: riscv: selftests: Add exception handling support Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:46 ` Andrew Jones
2023-09-04 13:46 ` Andrew Jones
2023-09-04 13:46 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 6/8] KVM: riscv: selftests: Add guest helper to get vcpu id Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 13:48 ` Andrew Jones
2023-09-04 13:48 ` Andrew Jones
2023-09-04 13:48 ` Andrew Jones
2023-09-02 12:59 ` [PATCH v2 7/8] KVM: riscv: selftest: Change vcpu_has_ext to a common function Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 14:04 ` Andrew Jones
2023-09-04 14:04 ` Andrew Jones
2023-09-04 14:04 ` Andrew Jones
2023-09-06 10:10 ` Haibo Xu
2023-09-06 10:10 ` Haibo Xu
2023-09-06 10:10 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 3:57 ` Haibo Xu
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:01 ` Andrew Jones
2023-09-07 9:18 ` Haibo Xu
2023-09-07 9:18 ` Haibo Xu
2023-09-07 9:18 ` Haibo Xu
2023-09-02 12:59 ` [PATCH v2 8/8] KVM: riscv: selftests: Add sstc timer test Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-02 12:59 ` Haibo Xu
2023-09-04 14:58 ` Andrew Jones
2023-09-04 14:58 ` Andrew Jones
2023-09-04 14:58 ` Andrew Jones
2023-09-07 4:20 ` Haibo Xu
2023-09-07 4:20 ` Haibo Xu
2023-09-07 4:20 ` Haibo Xu
2023-09-07 19:01 ` Andrew Jones
2023-09-07 19:01 ` Andrew Jones
2023-09-07 19:01 ` Andrew Jones
2023-09-08 1:19 ` Haibo Xu
2023-09-08 1:19 ` Haibo Xu
2023-09-08 1:19 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-08 2:36 ` Haibo Xu
2023-09-05 10:36 ` [PATCH v2 0/8] RISCV: Add kvm Sstc timer selftest Andrew Jones
2023-09-05 10:36 ` Andrew Jones
2023-09-05 10:36 ` Andrew Jones
2023-09-06 1:23 ` Haibo Xu
2023-09-06 1:23 ` Haibo Xu
2023-09-06 1:23 ` Haibo Xu
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