All of lore.kernel.org
 help / color / mirror / Atom feed
From: Saif Abrar <saif.abrar@linux.vnet.ibm.com>
To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com,
	mst@redhat.com, marcel.apfelbaum@gmail.com, cohuck@redhat.com,
	pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com,
	saif.abrar@linux.vnet.ibm.com
Subject: [PATCH 00/10] pnv/phb4: Update PHB4 to the latest spec PH5
Date: Thu, 21 Mar 2024 05:04:12 -0500	[thread overview]
Message-ID: <20240321100422.5347-1-saif.abrar@linux.vnet.ibm.com> (raw)

Hello,

This series updates the existing PHB4 model to the latest spec:
"Power Systems Host Bridge 5 (PHB5) Functional Specification Version 0.5_00".

Updates include the following:
- implemented sticky reset logic
- implemented read-only, write-only, W1C and WxC logic
- return all 1's on read to unimplemented registers
- update PCIE registers for link status, speed and width
- implement IODA PCT debug table without any functionality
- set write-mask bits for PCIE Link-Control-2 register that is read/written by PHB4
- update LSI Source-ID register based on small/big PHB number of interrupts

Also, a new testbench for PHB4 model is added that does XSCOM read/writes
to various registers of interest and verifies the values.

Regards.

Saif Abrar (10):
  qtest/phb4: Add testbench for PHB4
  pnv/phb4: Add reset logic to PHB4
  pnv/phb4: Implement sticky reset logic in PHB4
  pnv/phb4: Implement read-only and write-only bits of registers
  pnv/phb4: Implement write-clear and return 1's on unimplemented reg read
  pnv/phb4: Set link-active status in HPSTAT and LMR registers
  pnv/phb4: Set link speed and width in the DLP training control register
  pnv/phb4: Implement IODA PCT table
  hw/pci: Set write-mask bits for PCIE Link-Control-2 register
  pnv/phb4: Mask off LSI Source-ID based on number of interrupts

 hw/pci-host/pnv_phb4.c                    | 601 ++++++++++++++++++++--
 hw/pci/pcie.c                             |   6 +
 include/hw/pci-host/pnv_phb4.h            |   9 +
 include/hw/pci-host/pnv_phb4_regs.h       |  66 ++-
 include/standard-headers/linux/pci_regs.h |   3 +
 tests/qtest/meson.build                   |   1 +
 tests/qtest/pnv-phb4-test.c               | 177 +++++++
 7 files changed, 805 insertions(+), 58 deletions(-)
 create mode 100644 tests/qtest/pnv-phb4-test.c

-- 
2.39.3



             reply	other threads:[~2024-03-21 10:06 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-21 10:04 Saif Abrar [this message]
2024-03-21 10:04 ` [PATCH 01/10] qtest/phb4: Add testbench for PHB4 Saif Abrar
2024-03-25  9:39   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 02/10] pnv/phb4: Add reset logic to PHB4 Saif Abrar
2024-03-25 13:32   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 03/10] pnv/phb4: Implement sticky reset logic in PHB4 Saif Abrar
2024-03-21 10:04 ` [PATCH 04/10] pnv/phb4: Implement read-only and write-only bits of registers Saif Abrar
2024-03-25 14:15   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 05/10] pnv/phb4: Implement write-clear and return 1's on unimplemented reg read Saif Abrar
2024-03-25 13:58   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 06/10] pnv/phb4: Set link-active status in HPSTAT and LMR registers Saif Abrar
2024-03-21 10:04 ` [PATCH 07/10] pnv/phb4: Set link speed and width in the DLP training control register Saif Abrar
2024-03-25 13:36   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 08/10] pnv/phb4: Implement IODA PCT table Saif Abrar
2024-03-25 13:35   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register Saif Abrar
2024-03-25 13:35   ` Cédric Le Goater
2024-03-25 14:37     ` Cornelia Huck
2024-03-21 10:04 ` [PATCH 10/10] pnv/phb4: Mask off LSI Source-ID based on number of interrupts Saif Abrar
2024-03-25 13:34   ` Cédric Le Goater
2024-03-27  9:59     ` Saif Abrar
2024-03-27 16:19       ` Cédric Le Goater
2024-03-28  9:31     ` Saif Abrar

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20240321100422.5347-1-saif.abrar@linux.vnet.ibm.com \
    --to=saif.abrar@linux.vnet.ibm.com \
    --cc=clg@kaod.org \
    --cc=cohuck@redhat.com \
    --cc=fbarrat@linux.ibm.com \
    --cc=lvivier@redhat.com \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=mst@redhat.com \
    --cc=npiggin@gmail.com \
    --cc=pbonzini@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    --cc=thuth@redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.