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From: "Cédric Le Goater" <clg@kaod.org>
To: Saif Abrar <saif.abrar@linux.vnet.ibm.com>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Cc: npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com,
	marcel.apfelbaum@gmail.com, cohuck@redhat.com,
	pbonzini@redhat.com, thuth@redhat.com, lvivier@redhat.com
Subject: Re: [PATCH 08/10] pnv/phb4: Implement IODA PCT table
Date: Mon, 25 Mar 2024 14:35:38 +0100	[thread overview]
Message-ID: <d9745d90-2982-46b7-879f-e5ad7cde47f0@kaod.org> (raw)
In-Reply-To: <20240321100422.5347-9-saif.abrar@linux.vnet.ibm.com>

On 3/21/24 11:04, Saif Abrar wrote:
> IODA PCT table (#3) is implemented
> without any functionality, being a debug table.
> 
> Signed-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>


Reviewed-by: Cédric Le Goater <clg@kaod.org>

Thanks,

C.


> ---
>   hw/pci-host/pnv_phb4.c              | 6 ++++++
>   include/hw/pci-host/pnv_phb4.h      | 2 ++
>   include/hw/pci-host/pnv_phb4_regs.h | 1 +
>   3 files changed, 9 insertions(+)
> 
> diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
> index 6823ffab54..f48750ee54 100644
> --- a/hw/pci-host/pnv_phb4.c
> +++ b/hw/pci-host/pnv_phb4.c
> @@ -263,6 +263,10 @@ static uint64_t *pnv_phb4_ioda_access(PnvPHB4 *phb,
>           mask = phb->big_phb ? PNV_PHB4_MAX_MIST : (PNV_PHB4_MAX_MIST >> 1);
>           mask -= 1;
>           break;
> +    case IODA3_TBL_PCT:
> +        tptr = phb->ioda_PCT;
> +        mask = 7;
> +        break;
>       case IODA3_TBL_RCAM:
>           mask = phb->big_phb ? 127 : 63;
>           break;
> @@ -361,6 +365,8 @@ static void pnv_phb4_ioda_write(PnvPHB4 *phb, uint64_t val)
>       /* Handle side effects */
>       switch (table) {
>       case IODA3_TBL_LIST:
> +    case IODA3_TBL_PCT:
> +        /* No action for debug tables */
>           break;
>       case IODA3_TBL_MIST: {
>           /* Special mask for MIST partial write */
> diff --git a/include/hw/pci-host/pnv_phb4.h b/include/hw/pci-host/pnv_phb4.h
> index 91e81eee0e..6d83e5616f 100644
> --- a/include/hw/pci-host/pnv_phb4.h
> +++ b/include/hw/pci-host/pnv_phb4.h
> @@ -64,6 +64,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(PnvPHB4, PNV_PHB4)
>   #define PNV_PHB4_MAX_LSIs          8
>   #define PNV_PHB4_MAX_INTs          4096
>   #define PNV_PHB4_MAX_MIST          (PNV_PHB4_MAX_INTs >> 2)
> +#define PNV_PHB4_MAX_PCT           128
>   #define PNV_PHB4_MAX_MMIO_WINDOWS  32
>   #define PNV_PHB4_MIN_MMIO_WINDOWS  16
>   #define PNV_PHB4_NUM_REGS          (0x3000 >> 3)
> @@ -144,6 +145,7 @@ struct PnvPHB4 {
>       /* On-chip IODA tables */
>       uint64_t ioda_LIST[PNV_PHB4_MAX_LSIs];
>       uint64_t ioda_MIST[PNV_PHB4_MAX_MIST];
> +    uint64_t ioda_PCT[PNV_PHB4_MAX_PCT];
>       uint64_t ioda_TVT[PNV_PHB4_MAX_TVEs];
>       uint64_t ioda_MBT[PNV_PHB4_MAX_MBEs];
>       uint64_t ioda_MDT[PNV_PHB4_MAX_PEs];
> diff --git a/include/hw/pci-host/pnv_phb4_regs.h b/include/hw/pci-host/pnv_phb4_regs.h
> index c1d5a83271..e30adff7b2 100644
> --- a/include/hw/pci-host/pnv_phb4_regs.h
> +++ b/include/hw/pci-host/pnv_phb4_regs.h
> @@ -486,6 +486,7 @@
>   
>   #define IODA3_TBL_LIST          1
>   #define IODA3_TBL_MIST          2
> +#define IODA3_TBL_PCT           3
>   #define IODA3_TBL_RCAM          5
>   #define IODA3_TBL_MRT           6
>   #define IODA3_TBL_PESTA         7



  reply	other threads:[~2024-03-25 13:36 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-21 10:04 [PATCH 00/10] pnv/phb4: Update PHB4 to the latest spec PH5 Saif Abrar
2024-03-21 10:04 ` [PATCH 01/10] qtest/phb4: Add testbench for PHB4 Saif Abrar
2024-03-25  9:39   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 02/10] pnv/phb4: Add reset logic to PHB4 Saif Abrar
2024-03-25 13:32   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 03/10] pnv/phb4: Implement sticky reset logic in PHB4 Saif Abrar
2024-03-21 10:04 ` [PATCH 04/10] pnv/phb4: Implement read-only and write-only bits of registers Saif Abrar
2024-03-25 14:15   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 05/10] pnv/phb4: Implement write-clear and return 1's on unimplemented reg read Saif Abrar
2024-03-25 13:58   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 06/10] pnv/phb4: Set link-active status in HPSTAT and LMR registers Saif Abrar
2024-03-21 10:04 ` [PATCH 07/10] pnv/phb4: Set link speed and width in the DLP training control register Saif Abrar
2024-03-25 13:36   ` Cédric Le Goater
2024-03-21 10:04 ` [PATCH 08/10] pnv/phb4: Implement IODA PCT table Saif Abrar
2024-03-25 13:35   ` Cédric Le Goater [this message]
2024-03-21 10:04 ` [PATCH 09/10] hw/pci: Set write-mask bits for PCIE Link-Control-2 register Saif Abrar
2024-03-25 13:35   ` Cédric Le Goater
2024-03-25 14:37     ` Cornelia Huck
2024-03-21 10:04 ` [PATCH 10/10] pnv/phb4: Mask off LSI Source-ID based on number of interrupts Saif Abrar
2024-03-25 13:34   ` Cédric Le Goater
2024-03-27  9:59     ` Saif Abrar
2024-03-27 16:19       ` Cédric Le Goater
2024-03-28  9:31     ` Saif Abrar

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