All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Christian König" <christian.koenig@amd.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: David1.Zhou@amd.com, jgg@ziepe.ca, daniel@ffwll.ch,
	dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org,
	linux-media@vger.kernel.org, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function
Date: Thu, 12 Mar 2020 12:02:09 +0100	[thread overview]
Message-ID: <211ea421-3621-b380-cada-c2432da45172@amd.com> (raw)
In-Reply-To: <20200312104729.GA26031@infradead.org>

Am 12.03.20 um 11:47 schrieb Christoph Hellwig:
> On Thu, Mar 12, 2020 at 11:31:35AM +0100, Christian König wrote:
> [SNIP]
>> I mean we could come up with a new structure for this, but to me that just
>> looks like reinventing the wheel. Especially since drivers need to be able
>> to handle both I/O to system memory and I/O to PCIe BARs.
> The structure for holding the struct page side of the scatterlist is
> called struct bio_vec, so far mostly used by the block and networking
> code.

Yeah, I'm aware of this.

> The structure for holding dma addresses doesn't really exist
> in a generic form, but would be an array of these structures:
>
> struct dma_sg {
> 	dma_addr_t	addr;
> 	u32		len;
> };

So the whole idea is to nuke scatterlist/sg_table in the long term and 
switch over to using bio_vec as input and dma_sg as output for a DMA 
mapping operation.

Is that correct? If yes I could live with that, but it makes my patchset 
much more complicated.

> Keeping them separate is important as most IOMMU drivers will return
> less entries than you can feed them.  E.g. if your input boundaries
> are 4k aligned you will usually just get a single IOVA entry back.
> I will soon also have a dma mapping interface that will take advantage
> of that fact.

Yeah, I noticed as well that this is not really well handled.

Thanks for the feedback,
Christian.

WARNING: multiple messages have this Message-ID (diff)
From: "Christian König" <christian.koenig@amd.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	linaro-mm-sig@lists.linaro.org, jgg@ziepe.ca,
	linux-media@vger.kernel.org
Subject: Re: [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function
Date: Thu, 12 Mar 2020 12:02:09 +0100	[thread overview]
Message-ID: <211ea421-3621-b380-cada-c2432da45172@amd.com> (raw)
In-Reply-To: <20200312104729.GA26031@infradead.org>

Am 12.03.20 um 11:47 schrieb Christoph Hellwig:
> On Thu, Mar 12, 2020 at 11:31:35AM +0100, Christian König wrote:
> [SNIP]
>> I mean we could come up with a new structure for this, but to me that just
>> looks like reinventing the wheel. Especially since drivers need to be able
>> to handle both I/O to system memory and I/O to PCIe BARs.
> The structure for holding the struct page side of the scatterlist is
> called struct bio_vec, so far mostly used by the block and networking
> code.

Yeah, I'm aware of this.

> The structure for holding dma addresses doesn't really exist
> in a generic form, but would be an array of these structures:
>
> struct dma_sg {
> 	dma_addr_t	addr;
> 	u32		len;
> };

So the whole idea is to nuke scatterlist/sg_table in the long term and 
switch over to using bio_vec as input and dma_sg as output for a DMA 
mapping operation.

Is that correct? If yes I could live with that, but it makes my patchset 
much more complicated.

> Keeping them separate is important as most IOMMU drivers will return
> less entries than you can feed them.  E.g. if your input boundaries
> are 4k aligned you will usually just get a single IOVA entry back.
> I will soon also have a dma mapping interface that will take advantage
> of that fact.

Yeah, I noticed as well that this is not really well handled.

Thanks for the feedback,
Christian.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: "Christian König" <christian.koenig@amd.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: David1.Zhou@amd.com, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org, linaro-mm-sig@lists.linaro.org,
	jgg@ziepe.ca, linux-media@vger.kernel.org
Subject: Re: [Intel-gfx] [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function
Date: Thu, 12 Mar 2020 12:02:09 +0100	[thread overview]
Message-ID: <211ea421-3621-b380-cada-c2432da45172@amd.com> (raw)
In-Reply-To: <20200312104729.GA26031@infradead.org>

Am 12.03.20 um 11:47 schrieb Christoph Hellwig:
> On Thu, Mar 12, 2020 at 11:31:35AM +0100, Christian König wrote:
> [SNIP]
>> I mean we could come up with a new structure for this, but to me that just
>> looks like reinventing the wheel. Especially since drivers need to be able
>> to handle both I/O to system memory and I/O to PCIe BARs.
> The structure for holding the struct page side of the scatterlist is
> called struct bio_vec, so far mostly used by the block and networking
> code.

Yeah, I'm aware of this.

> The structure for holding dma addresses doesn't really exist
> in a generic form, but would be an array of these structures:
>
> struct dma_sg {
> 	dma_addr_t	addr;
> 	u32		len;
> };

So the whole idea is to nuke scatterlist/sg_table in the long term and 
switch over to using bio_vec as input and dma_sg as output for a DMA 
mapping operation.

Is that correct? If yes I could live with that, but it makes my patchset 
much more complicated.

> Keeping them separate is important as most IOMMU drivers will return
> less entries than you can feed them.  E.g. if your input boundaries
> are 4k aligned you will usually just get a single IOVA entry back.
> I will soon also have a dma mapping interface that will take advantage
> of that fact.

Yeah, I noticed as well that this is not really well handled.

Thanks for the feedback,
Christian.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-03-12 11:02 UTC|newest]

Thread overview: 83+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-11 13:51 P2P for DMA-buf Christian König
2020-03-11 13:51 ` [Intel-gfx] " Christian König
2020-03-11 13:51 ` Christian König
2020-03-11 13:51 ` [PATCH 1/6] lib/scatterlist: add sg_set_dma_addr() function Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 15:28   ` Christoph Hellwig
2020-03-11 15:28     ` [Intel-gfx] " Christoph Hellwig
2020-03-12 10:14     ` Christian König
2020-03-12 10:14       ` [Intel-gfx] " Christian König
2020-03-12 10:14       ` Christian König
2020-03-12 10:19       ` Christoph Hellwig
2020-03-12 10:19         ` [Intel-gfx] " Christoph Hellwig
2020-03-12 10:31         ` Christian König
2020-03-12 10:31           ` [Intel-gfx] " Christian König
2020-03-12 10:31           ` Christian König
2020-03-12 10:47           ` Christoph Hellwig
2020-03-12 10:47             ` [Intel-gfx] " Christoph Hellwig
2020-03-12 11:02             ` Christian König [this message]
2020-03-12 11:02               ` Christian König
2020-03-12 11:02               ` Christian König
2020-03-12 14:19             ` Jason Gunthorpe
2020-03-12 14:19               ` Jason Gunthorpe
2020-03-12 15:39               ` Christian König
2020-03-12 15:39                 ` [Intel-gfx] " Christian König
2020-03-12 15:39                 ` Christian König
2020-03-12 16:19                 ` Jason Gunthorpe
2020-03-12 16:19                   ` Jason Gunthorpe
2020-03-12 16:13               ` Logan Gunthorpe
2020-03-12 16:13                 ` [Intel-gfx] " Logan Gunthorpe
2020-03-12 16:13                 ` Logan Gunthorpe
2020-03-13 11:21               ` Christoph Hellwig
2020-03-13 11:21                 ` [Intel-gfx] " Christoph Hellwig
2020-03-13 12:17                 ` Jason Gunthorpe
2020-03-13 12:17                   ` Jason Gunthorpe
2020-03-16  8:56                   ` Christoph Hellwig
2020-03-16  8:56                     ` [Intel-gfx] " Christoph Hellwig
2020-03-16  9:41                     ` Christian König
2020-03-16  9:41                       ` [Intel-gfx] " Christian König
2020-03-16  9:41                       ` Christian König
2020-03-16  9:52                       ` Christoph Hellwig
2020-03-16  9:52                         ` [Intel-gfx] " Christoph Hellwig
2020-03-16 12:37                         ` Jason Gunthorpe
2020-03-16 12:37                           ` Jason Gunthorpe
2020-03-13 13:33                 ` Christian König
2020-03-13 13:33                   ` [Intel-gfx] " Christian König
2020-03-13 13:33                   ` Christian König
2020-03-11 13:51 ` [PATCH 2/6] dma-buf: add peer2peer flag Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 13:51 ` [PATCH 3/6] drm/amdgpu: note that we can handle peer2peer DMA-buf Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 13:51 ` [PATCH 4/6] drm/amdgpu: add checks if DMA-buf P2P is supported Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 14:04   ` Jason Gunthorpe
2020-03-11 14:04     ` Jason Gunthorpe
2020-03-11 14:33     ` Christian König
2020-03-11 14:33       ` [Intel-gfx] " Christian König
2020-03-11 14:33       ` Christian König
2020-03-11 14:38       ` Jason Gunthorpe
2020-03-11 14:38         ` Jason Gunthorpe
2020-03-11 14:43         ` Christian König
2020-03-11 14:43           ` [Intel-gfx] " Christian König
2020-03-11 14:43           ` Christian König
2020-03-11 14:48           ` Jason Gunthorpe
2020-03-11 14:48             ` Jason Gunthorpe
2020-03-11 13:51 ` [PATCH 5/6] drm/amdgpu: add support for exporting VRAM using DMA-buf v2 Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 14:33   ` Jason Gunthorpe
2020-03-11 14:33     ` Jason Gunthorpe
2020-03-11 14:39   ` Jason Gunthorpe
2020-03-11 14:39     ` Jason Gunthorpe
2020-03-11 15:08   ` Alex Deucher
2020-03-11 15:08     ` [Intel-gfx] " Alex Deucher
2020-03-11 15:08     ` Alex Deucher
2020-03-11 13:51 ` [PATCH 6/6] drm/amdgpu: improve amdgpu_gem_info debugfs file Christian König
2020-03-11 13:51   ` [Intel-gfx] " Christian König
2020-03-11 13:51   ` Christian König
2020-03-11 18:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] lib/scatterlist: add sg_set_dma_addr() function Patchwork
2020-03-11 18:34 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=211ea421-3621-b380-cada-c2432da45172@amd.com \
    --to=christian.koenig@amd.com \
    --cc=David1.Zhou@amd.com \
    --cc=daniel@ffwll.ch \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=hch@infradead.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jgg@ziepe.ca \
    --cc=linaro-mm-sig@lists.linaro.org \
    --cc=linux-media@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.