Re: [PATCH v3 2/3] drm/i915/psr: Use full update In case of area calculation fails

From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Hogander, Jouni" <jouni.hogander@intel.com>
Cc: "markpearson@lenovo.com" <markpearson@lenovo.com>,
	"Kahola, Mika" <mika.kahola@intel.com>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v3 2/3] drm/i915/psr: Use full update In case of area calculation fails
Date: Tue, 10 May 2022 18:52:15 +0000	[thread overview]
Message-ID: <379e0ac62228f2fd3d314bf84c0ed5bf0609d6d9.camel@intel.com> (raw)
In-Reply-To: <20220510183313.1046628-3-jouni.hogander@intel.com>

On Tue, 2022-05-10 at 21:33 +0300, Jouni Högander wrote:
> Currently we have some corner cases where area calculation fails.  For
> these sel fetch area calculation ends up having update area as y1 = 0,
> y2 = 4. Instead of these values safer option is full update.
> 
> One of such for example is big fb with offset. We don't have usable
> offset in psr2_sel_fetch_update. Currently it's open what is the
> proper way to fix this corner case. Use full update for now.
> 
> v2: Commit message modified
> v3: Print out debug info once when area calculation fails
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Mark Pearson <markpearson@lenovo.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 06db407e2749..3561c218cfb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1685,6 +1685,7 @@ static bool psr2_sel_fetch_pipe_state_supported(const struct intel_crtc_state *c
>  int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  				struct intel_crtc *crtc)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
>  	struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
>  	struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 = -1 };
>  	struct intel_plane_state *new_plane_state, *old_plane_state;
> @@ -1770,6 +1771,17 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
>  		clip_area_update(&pipe_clip, &damaged_area);
>  	}
>  
> +	/*
> +	 * TODO: For now we are just using full update in case
> +	 * selective fetch area calculation fails. To optimize this we
> +	 * should identify cases where this happens and fix the area
> +	 * calculation for those.
> +	 */
> +	if (pipe_clip.y1 == -1) {
> +		drm_dbg_once_kms(&dev_priv->drm, "No selective fetch area, using full update");

The debug message is misleading, a better message would be: Selective fetch area calculation failed in pipeA.

with that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +		full_update = true;
> +	}
> +
>  	if (full_update)
>  		goto skip_sel_fetch_set_loop;
>  