From: Satendra Singh Thakur <satendra.t@samsung.com> To: Xinliang Liu <z.liuxinliang@hisilicon.com>, Rongrong Zou <zourongrong@gmail.com>, Xinwei Kong <kong.kongxinwei@hisilicon.com>, Chen Feng <puck.chen@hisilicon.com>, David Airlie <airlied@linux.ie>, John Stultz <john.stultz@linaro.org>, Sean Paul <seanpaul@chromium.org>, Satendra Singh Thakur <satendra.t@samsung.com>, Dave Airlie <airlied@redhat.com>, Daniel Vetter <daniel.vetter@ffwll.ch>, Philippe Cornu <philippe.cornu@st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Thomas Hellstrom <thellstrom@vmware.com>, Maxime Ripard <maxime.ripard@free-electrons.com>, Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>, Rob Herring <robh@kernel.org>, Ben Widawsky <ben@bwidawsk.net>, Peter Griffin <peter.griffin@linaro.org>, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Cc: Madhur Verma <madhur.verma@samsung.com>, Hemanshu Srivastava <hemanshu.s@samsung.com> Subject: [PATCH 06/13] drm/kms/mode/hisilicon-kirin-dsi-ade: using helper function drm_display_mode_to_videomode for calculating timing parameters Date: Thu, 3 May 2018 14:31:02 +0530 [thread overview] Message-ID: <389527ff7cd74fb864ea620e351741a13740830d.1525087679.git.satendra.t@samsung.com> (raw) In-Reply-To: <cover.1525087679.git.satendra.t@samsung.com> -Avoidded duplicate logic for the timing calculations -Removed func ade_set_pix_clk and combined it with func ade_ldi_set_mode Signed-off-by: Satendra Singh Thakur <satendra.t@samsung.com> Cc: Madhur Verma <madhur.verma@samsung.com> Cc: Hemanshu Srivastava <hemanshu.s@samsung.com> --- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 42 ++++++++++---------- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 52 +++++++++---------------- 2 files changed, 39 insertions(+), 55 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c index b4c7af3..902f63f 100644 --- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c +++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c @@ -23,6 +23,7 @@ #include <drm/drm_mipi_dsi.h> #include <drm/drm_encoder_slave.h> #include <drm/drm_atomic_helper.h> +#include <video/videomode.h> #include "dw_dsi_reg.h" @@ -447,7 +448,7 @@ static void dsi_set_mode_timing(void __iomem *base, struct drm_display_mode *mode, enum mipi_dsi_pixel_format format) { - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 hline_time; u32 hsa_time; u32 hbp_time; @@ -467,25 +468,22 @@ static void dsi_set_mode_timing(void __iomem *base, * The DSI IP accepts vertical timing using lines as normal, * but horizontal timing is a mixture of pixel-clocks for the * active region and byte-lane clocks for the blanking-related - * timings. hfp is specified as the total hline_time in byte- - * lane clocks minus hsa, hbp and active. + * timings. vm.hfront_porch is specified as the total hline_time + * in byte-lane clocks minus hsa, vm.hback_porch and active. */ pixel_clk_kHz = mode->clock; htot = mode->htotal; vtot = mode->vtotal; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + + drm_display_mode_to_videomode(mode, &vm); + + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; } - hsa_time = (hsw * lane_byte_clk_kHz) / pixel_clk_kHz; - hbp_time = (hbp * lane_byte_clk_kHz) / pixel_clk_kHz; + hsa_time = (vm.hsync_len * lane_byte_clk_kHz) / pixel_clk_kHz; + hbp_time = (vm.hback_porch * lane_byte_clk_kHz) / pixel_clk_kHz; tmp = (u64)htot * (u64)lane_byte_clk_kHz; hline_time = DIV_ROUND_UP(tmp, pixel_clk_kHz); @@ -494,17 +492,17 @@ static void dsi_set_mode_timing(void __iomem *base, writel(hbp_time, base + VID_HBP_TIME); writel(hline_time, base + VID_HLINE_TIME); - writel(vsw, base + VID_VSA_LINES); - writel(vbp, base + VID_VBP_LINES); - writel(vfp, base + VID_VFP_LINES); + writel(vm.vsync_len, base + VID_VSA_LINES); + writel(vm.vback_porch, base + VID_VBP_LINES); + writel(vm.vfront_porch, base + VID_VFP_LINES); writel(mode->vdisplay, base + VID_VACTIVE_LINES); writel(mode->hdisplay, base + VID_PKT_SIZE); - DRM_DEBUG_DRIVER("htot=%d, hfp=%d, hbp=%d, hsw=%d\n", - htot, hfp, hbp, hsw); - DRM_DEBUG_DRIVER("vtol=%d, vfp=%d, vbp=%d, vsw=%d\n", - vtot, vfp, vbp, vsw); - DRM_DEBUG_DRIVER("hsa_time=%d, hbp_time=%d, hline_time=%d\n", + DRM_DEBUG_DRIVER("htot=%d, vm.hfront_porch=%d, vm.hback_porch=%d, vm.hsync_len=%d\n", + htot, vm.hfront_porch, vm.hback_porch, vm.hsync_len); + DRM_DEBUG_DRIVER("vtol=%d, vm.vfront_porch=%d, vm.vback_porch=%d, vm.vsync_len=%d\n", + vtot, vm.vfront_porch, vm.vback_porch, vm.vsync_len); + DRM_DEBUG_DRIVER("hsa_time=%d, vm.hback_porch_time=%d, hline_time=%d\n", hsa_time, hbp_time, hline_time); } diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index 2269be9..c3eea17 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -30,6 +30,7 @@ #include <drm/drm_plane_helper.h> #include <drm/drm_gem_cma_helper.h> #include <drm/drm_fb_cma_helper.h> +#include <video/videomode.h> #include "kirin_drm_drv.h" #include "kirin_ade_reg.h" @@ -190,24 +191,6 @@ static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, return true; } - -static void ade_set_pix_clk(struct ade_hw_ctx *ctx, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - u32 clk_Hz = mode->clock * 1000; - int ret; - - /* - * Success should be guaranteed in mode_valid call back, - * so failure shouldn't happen here - */ - ret = clk_set_rate(ctx->ade_pix_clk, clk_Hz); - if (ret) - DRM_ERROR("failed to set pixel clk %dHz (%d)\n", clk_Hz, ret); - adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; -} - static void ade_ldi_set_mode(struct ade_crtc *acrtc, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) @@ -216,28 +199,24 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, void __iomem *base = ctx->base; u32 width = mode->hdisplay; u32 height = mode->vdisplay; - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 plr_flags; + int ret; plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC) ? FLAG_NVSYNC : 0; plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? FLAG_NHSYNC : 0; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + drm_display_mode_to_videomode(mode, &vm); + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; } - writel((hbp << HBP_OFST) | hfp, base + LDI_HRZ_CTRL0); + writel((vm.hback_porch << HBP_OFST) | vm.hfront_porch, + base + LDI_HRZ_CTRL0); /* the configured value is actual value - 1 */ - writel(hsw - 1, base + LDI_HRZ_CTRL1); - writel((vbp << VBP_OFST) | vfp, base + LDI_VRT_CTRL0); + writel(vm.hsync_len - 1, base + LDI_HRZ_CTRL1); + writel((vm.vback_porch << VBP_OFST) | vm.vfront_porch, + base + LDI_VRT_CTRL0); /* the configured value is actual value - 1 */ - writel(vsw - 1, base + LDI_VRT_CTRL1); + writel(vm.vsync_len - 1, base + LDI_VRT_CTRL1); /* the configured value is actual value - 1 */ writel(((height - 1) << VSIZE_OFST) | (width - 1), base + LDI_DSP_SIZE); @@ -253,7 +232,14 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, writel(width * height - 1, base + ADE_CTRAN_IMAGE_SIZE(ADE_CTRAN6)); ade_update_reload_bit(base, CTRAN_OFST + ADE_CTRAN6, 0); - ade_set_pix_clk(ctx, mode, adj_mode); + /* + * Success should be guaranteed in mode_valid call back, + * so failure shouldn't happen here + */ + ret = clk_set_rate(ctx->ade_pix_clk, vm.pixelclock); + if (ret) + DRM_ERROR("failed to set pixel clk %dHz (%d)\n", + vm.pixelclock, ret); + adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; DRM_DEBUG_DRIVER("set mode: %dx%d\n", width, height); } -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Satendra Singh Thakur <satendra.t@samsung.com> To: Xinliang Liu <z.liuxinliang@hisilicon.com>, Rongrong Zou <zourongrong@gmail.com>, Xinwei Kong <kong.kongxinwei@hisilicon.com>, Chen Feng <puck.chen@hisilicon.com>, David Airlie <airlied@linux.ie>, John Stultz <john.stultz@linaro.org>, Sean Paul <seanpaul@chromium.org>, Satendra Singh Thakur <satendra.t@samsung.com>, Dave Airlie <airlied@redhat.com>, Daniel Vetter <daniel.vetter@ffwll.ch>, Philippe Cornu <philippe.cornu@st.com>, Philipp Zabel <p.zabel@pengutronix.de>, Thomas Hellstrom <thellstrom@vmware.com>, Maxime Ripard <maxime.ripard@free-electrons.com>, Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>, Rob Herring <robh@kernel.org>, Ben Widawsky <ben@bwidawsk.net>, Peter Griffin <peter.griffin@linaro.org>, dri-devel@lists.freedesktop. Cc: Madhur Verma <madhur.verma@samsung.com>, Hemanshu Srivastava <hemanshu.s@samsung.com> Subject: [PATCH 06/13] drm/kms/mode/hisilicon-kirin-dsi-ade: using helper function drm_display_mode_to_videomode for calculating timing parameters Date: Thu, 3 May 2018 14:31:02 +0530 [thread overview] Message-ID: <389527ff7cd74fb864ea620e351741a13740830d.1525087679.git.satendra.t@samsung.com> (raw) In-Reply-To: <cover.1525087679.git.satendra.t@samsung.com> -Avoidded duplicate logic for the timing calculations -Removed func ade_set_pix_clk and combined it with func ade_ldi_set_mode Signed-off-by: Satendra Singh Thakur <satendra.t@samsung.com> Cc: Madhur Verma <madhur.verma@samsung.com> Cc: Hemanshu Srivastava <hemanshu.s@samsung.com> --- drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c | 42 ++++++++++---------- drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 52 +++++++++---------------- 2 files changed, 39 insertions(+), 55 deletions(-) diff --git a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c index b4c7af3..902f63f 100644 --- a/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c +++ b/drivers/gpu/drm/hisilicon/kirin/dw_drm_dsi.c @@ -23,6 +23,7 @@ #include <drm/drm_mipi_dsi.h> #include <drm/drm_encoder_slave.h> #include <drm/drm_atomic_helper.h> +#include <video/videomode.h> #include "dw_dsi_reg.h" @@ -447,7 +448,7 @@ static void dsi_set_mode_timing(void __iomem *base, struct drm_display_mode *mode, enum mipi_dsi_pixel_format format) { - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 hline_time; u32 hsa_time; u32 hbp_time; @@ -467,25 +468,22 @@ static void dsi_set_mode_timing(void __iomem *base, * The DSI IP accepts vertical timing using lines as normal, * but horizontal timing is a mixture of pixel-clocks for the * active region and byte-lane clocks for the blanking-related - * timings. hfp is specified as the total hline_time in byte- - * lane clocks minus hsa, hbp and active. + * timings. vm.hfront_porch is specified as the total hline_time + * in byte-lane clocks minus hsa, vm.hback_porch and active. */ pixel_clk_kHz = mode->clock; htot = mode->htotal; vtot = mode->vtotal; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + + drm_display_mode_to_videomode(mode, &vm); + + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; } - hsa_time = (hsw * lane_byte_clk_kHz) / pixel_clk_kHz; - hbp_time = (hbp * lane_byte_clk_kHz) / pixel_clk_kHz; + hsa_time = (vm.hsync_len * lane_byte_clk_kHz) / pixel_clk_kHz; + hbp_time = (vm.hback_porch * lane_byte_clk_kHz) / pixel_clk_kHz; tmp = (u64)htot * (u64)lane_byte_clk_kHz; hline_time = DIV_ROUND_UP(tmp, pixel_clk_kHz); @@ -494,17 +492,17 @@ static void dsi_set_mode_timing(void __iomem *base, writel(hbp_time, base + VID_HBP_TIME); writel(hline_time, base + VID_HLINE_TIME); - writel(vsw, base + VID_VSA_LINES); - writel(vbp, base + VID_VBP_LINES); - writel(vfp, base + VID_VFP_LINES); + writel(vm.vsync_len, base + VID_VSA_LINES); + writel(vm.vback_porch, base + VID_VBP_LINES); + writel(vm.vfront_porch, base + VID_VFP_LINES); writel(mode->vdisplay, base + VID_VACTIVE_LINES); writel(mode->hdisplay, base + VID_PKT_SIZE); - DRM_DEBUG_DRIVER("htot=%d, hfp=%d, hbp=%d, hsw=%d\n", - htot, hfp, hbp, hsw); - DRM_DEBUG_DRIVER("vtol=%d, vfp=%d, vbp=%d, vsw=%d\n", - vtot, vfp, vbp, vsw); - DRM_DEBUG_DRIVER("hsa_time=%d, hbp_time=%d, hline_time=%d\n", + DRM_DEBUG_DRIVER("htot=%d, vm.hfront_porch=%d, vm.hback_porch=%d, vm.hsync_len=%d\n", + htot, vm.hfront_porch, vm.hback_porch, vm.hsync_len); + DRM_DEBUG_DRIVER("vtol=%d, vm.vfront_porch=%d, vm.vback_porch=%d, vm.vsync_len=%d\n", + vtot, vm.vfront_porch, vm.vback_porch, vm.vsync_len); + DRM_DEBUG_DRIVER("hsa_time=%d, vm.hback_porch_time=%d, hline_time=%d\n", hsa_time, hbp_time, hline_time); } diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index 2269be9..c3eea17 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -30,6 +30,7 @@ #include <drm/drm_plane_helper.h> #include <drm/drm_gem_cma_helper.h> #include <drm/drm_fb_cma_helper.h> +#include <video/videomode.h> #include "kirin_drm_drv.h" #include "kirin_ade_reg.h" @@ -190,24 +191,6 @@ static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, return true; } - -static void ade_set_pix_clk(struct ade_hw_ctx *ctx, - struct drm_display_mode *mode, - struct drm_display_mode *adj_mode) -{ - u32 clk_Hz = mode->clock * 1000; - int ret; - - /* - * Success should be guaranteed in mode_valid call back, - * so failure shouldn't happen here - */ - ret = clk_set_rate(ctx->ade_pix_clk, clk_Hz); - if (ret) - DRM_ERROR("failed to set pixel clk %dHz (%d)\n", clk_Hz, ret); - adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; -} - static void ade_ldi_set_mode(struct ade_crtc *acrtc, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) @@ -216,28 +199,24 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, void __iomem *base = ctx->base; u32 width = mode->hdisplay; u32 height = mode->vdisplay; - u32 hfp, hbp, hsw, vfp, vbp, vsw; + struct videomode vm; u32 plr_flags; + int ret; plr_flags = (mode->flags & DRM_MODE_FLAG_NVSYNC) ? FLAG_NVSYNC : 0; plr_flags |= (mode->flags & DRM_MODE_FLAG_NHSYNC) ? FLAG_NHSYNC : 0; - hfp = mode->hsync_start - mode->hdisplay; - hbp = mode->htotal - mode->hsync_end; - hsw = mode->hsync_end - mode->hsync_start; - vfp = mode->vsync_start - mode->vdisplay; - vbp = mode->vtotal - mode->vsync_end; - vsw = mode->vsync_end - mode->vsync_start; - if (vsw > 15) { - DRM_DEBUG_DRIVER("vsw exceeded 15\n"); - vsw = 15; + drm_display_mode_to_videomode(mode, &vm); + if (vm.vsync_len > 15) { + DRM_DEBUG_DRIVER("vm.vsync_len exceeded 15\n"); + vm.vsync_len = 15; } - writel((hbp << HBP_OFST) | hfp, base + LDI_HRZ_CTRL0); + writel((vm.hback_porch << HBP_OFST) | vm.hfront_porch, + base + LDI_HRZ_CTRL0); /* the configured value is actual value - 1 */ - writel(hsw - 1, base + LDI_HRZ_CTRL1); - writel((vbp << VBP_OFST) | vfp, base + LDI_VRT_CTRL0); + writel(vm.hsync_len - 1, base + LDI_HRZ_CTRL1); + writel((vm.vback_porch << VBP_OFST) | vm.vfront_porch, + base + LDI_VRT_CTRL0); /* the configured value is actual value - 1 */ - writel(vsw - 1, base + LDI_VRT_CTRL1); + writel(vm.vsync_len - 1, base + LDI_VRT_CTRL1); /* the configured value is actual value - 1 */ writel(((height - 1) << VSIZE_OFST) | (width - 1), base + LDI_DSP_SIZE); @@ -253,7 +232,14 @@ static void ade_ldi_set_mode(struct ade_crtc *acrtc, writel(width * height - 1, base + ADE_CTRAN_IMAGE_SIZE(ADE_CTRAN6)); ade_update_reload_bit(base, CTRAN_OFST + ADE_CTRAN6, 0); - ade_set_pix_clk(ctx, mode, adj_mode); + /* + * Success should be guaranteed in mode_valid call back, + * so failure shouldn't happen here + */ + ret = clk_set_rate(ctx->ade_pix_clk, vm.pixelclock); + if (ret) + DRM_ERROR("failed to set pixel clk %dHz (%d)\n", + vm.pixelclock, ret); + adj_mode->clock = clk_get_rate(ctx->ade_pix_clk) / 1000; DRM_DEBUG_DRIVER("set mode: %dx%d\n", width, height); } -- 2.7.4
next prev parent reply other threads:[~2018-05-03 9:01 UTC|newest] Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <CGME20180503082417epcas5p19ee919d68eb5ae18f183a41881869cc1@epcas5p1.samsung.com> 2018-05-03 8:23 ` [PATCH 00/13] drm/kms/mode: using helper func drm_display_mode_to/from_videomode for calculating timing parameters Satendra Singh Thakur 2018-05-03 8:23 ` Satendra Singh Thakur 2018-05-03 8:23 ` Satendra Singh Thakur 2018-05-03 8:23 ` Satendra Singh Thakur [not found] ` <CGME20180503083608epcas5p4c9cda0f0b42af8232691baa7cbde96c9@epcas5p4.samsung.com> 2018-05-03 8:36 ` [PATCH 01/13] drm/kms/mode/atmel-hlcdc: using helper func drm_display_mode_to_videomode " Satendra Singh Thakur 2018-05-03 8:36 ` Satendra Singh Thakur [not found] ` <CGME20180503083729epcas5p16b374ea53fd3cf338ce7085d6467da13@epcas5p1.samsung.com> 2018-05-03 8:37 ` [PATCH 02/13] drm/kms/mode/bridge-tc358767: " Satendra Singh Thakur [not found] ` <CGME20180503083956epcas5p1eb97f7bd534e58e7154f5f11733e7aa0@epcas5p1.samsung.com> 2018-05-03 8:39 ` [PATCH 03/13] drm/kms/mode/exynos-dsi: " Satendra Singh Thakur 2018-05-03 8:39 ` Satendra Singh Thakur 2018-05-03 12:21 ` Robin Murphy 2018-05-03 12:21 ` Robin Murphy 2018-05-03 12:21 ` Robin Murphy [not found] ` <CGME20180504081613epcas5p405d342fe333975048175c4a360067f52@epcas5p4.samsung.com> 2018-05-04 8:15 ` [PATCH v1 " Satendra Singh Thakur 2018-05-04 8:15 ` Satendra Singh Thakur 2018-05-04 11:25 ` Robin Murphy 2018-05-04 11:25 ` Robin Murphy 2018-05-04 11:25 ` Robin Murphy [not found] ` <CGME20180507033238epcas5p2601b5ccbba8fa02cdde4f1375e90abe9@epcas5p2.samsung.com> 2018-05-07 3:32 ` [PATCH v2 " Satendra Singh Thakur 2018-05-07 3:32 ` Satendra Singh Thakur 2018-05-07 9:33 ` Andrzej Hajda 2018-05-07 9:33 ` Andrzej Hajda 2018-05-07 9:33 ` Andrzej Hajda [not found] ` <CGME20180503084441epcas5p371997e3772a2fe2bfb4dc26447dafe65@epcas5p3.samsung.com> 2018-05-03 8:44 ` [PATCH 04/13] drm/kms/mode/fsl-dcu: " Satendra Singh Thakur 2018-05-07 20:46 ` Stefan Agner 2018-05-07 20:46 ` Stefan Agner [not found] ` <CGME20180508041658epcas5p2deee8f1a13c2b00d7d628063d8b16b00@epcas5p2.samsung.com> 2018-05-08 4:15 ` [PATCH v1 " Satendra Singh Thakur [not found] ` <CGME20180503084655epcas5p127066f560b7c2d75f679e682c914abd6@epcas5p1.samsung.com> 2018-05-03 8:46 ` [PATCH 05/13] drm/kms/mode/gma500-mdfld_dsi_dpi: using helper function " Satendra Singh Thakur [not found] ` <CGME20180503090123epcas5p263afd14e32bc2a50e446bc674f7498d7@epcas5p2.samsung.com> 2018-05-03 9:01 ` Satendra Singh Thakur [this message] 2018-05-03 9:01 ` [PATCH 06/13] drm/kms/mode/hisilicon-kirin-dsi-ade: " Satendra Singh Thakur [not found] ` <CGME20180503090930epcas5p23ef09c1e72c344bf8d879a344d0998cf@epcas5p2.samsung.com> 2018-05-03 9:09 ` [PATCH 07/13] drm/kms/mode/meson-encoder: " Satendra Singh Thakur 2018-05-03 9:09 ` Satendra Singh Thakur 2018-05-03 9:09 ` Satendra Singh Thakur [not found] ` <CGME20180503093553epcas5p35363f1990726114a9079be483cc26d9a@epcas5p3.samsung.com> 2018-05-03 9:35 ` [PATCH 08/13] drm/kms/mode/pl111-display: " Satendra Singh Thakur [not found] ` <CGME20180503105821epcas5p21a35d9eb29f83201d337a195d218fdd3@epcas5p2.samsung.com> 2018-05-03 10:58 ` [PATCH 09/13] drm/kms/mode/sun4i-tv: using helper func drm_display_mode_from_videomode " Satendra Singh Thakur 2018-05-03 10:58 ` Satendra Singh Thakur 2018-05-03 11:02 ` Maxime Ripard 2018-05-03 11:02 ` Maxime Ripard 2018-05-03 11:02 ` Maxime Ripard [not found] ` <CGME20180504082405epcas5p212d6a9fbb2a0baac4166cb5b68616055@epcas5p2.samsung.com> 2018-05-04 8:23 ` [PATCH v1 " Satendra Singh Thakur 2018-05-04 8:23 ` Satendra Singh Thakur [not found] ` <CGME20180503110352epcas5p32d2bbf72da59a6e2183c9eb67c58f1ba@epcas5p3.samsung.com> 2018-05-03 11:03 ` [PATCH 10/13] drm/kms/mode/ti-lcdc: using helper func drm_display_mode_to_videomode " Satendra Singh Thakur [not found] ` <CGME20180503110834epcas5p25cf074e5fe2292c8053dfa9ebe9f8dc7@epcas5p2.samsung.com> 2018-05-03 11:08 ` [PATCH 11/13] drm/kms/mode/tegra: " Satendra Singh Thakur [not found] ` <CGME20180503111008epcas5p26088af1ff767ac0bf06cae934f1da339@epcas5p2.samsung.com> 2018-05-03 11:09 ` [PATCH 12/13] drm/kms/mode/mtk_dpi_dsi: " Satendra Singh Thakur 2018-05-03 11:09 ` Satendra Singh Thakur [not found] ` <CGME20180503111248epcas5p4c2b8d1fd447cfbe0b53cf535faaf92c2@epcas5p4.samsung.com> 2018-05-03 11:12 ` [PATCH 13/13] drm/kms/mode/bridge-adv7533: " Satendra Singh Thakur 2018-05-07 13:46 ` [PATCH 00/13] drm/kms/mode: using helper func drm_display_mode_to/from_videomode " Daniel Vetter 2018-05-07 13:46 ` Daniel Vetter 2018-05-07 13:46 ` Daniel Vetter 2018-05-07 13:46 ` Daniel Vetter [not found] ` <CGME20180508105900epcas5p25ffe94a214e5ad0848d834d6c3562ad6@epcas5p2.samsung.com> 2018-05-08 10:58 ` Satendra Singh Thakur 2018-05-08 10:58 ` Satendra Singh Thakur 2018-05-08 10:58 ` Satendra Singh Thakur [not found] ` <CGME20180509115224epcas5p1c958418bc36fd224e8d36b9511c5beea@epcas5p1.samsung.com> 2018-05-09 11:52 ` Satendra Singh Thakur 2018-05-09 11:52 ` Satendra Singh Thakur 2018-05-09 11:52 ` Satendra Singh Thakur 2018-05-13 14:12 ` Daniel Vetter 2018-05-13 14:12 ` Daniel Vetter 2018-05-13 14:12 ` Daniel Vetter 2018-05-13 14:12 ` Daniel Vetter
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