From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Xingyu Wu <xingyu.wu@starfivetech.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>
Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v3 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Date: Wed, 15 Mar 2023 08:55:59 +0100 [thread overview]
Message-ID: <478974c3-7302-e773-8d70-fcb2323f65ea@linaro.org> (raw)
In-Reply-To: <20230314124404.117592-2-xingyu.wu@starfivetech.com>
On 14/03/2023 13:43, Xingyu Wu wrote:
> Add bindings for the System-Top-Group clock and reset generator (STGCRG)
> on the JH7110 RISC-V SoC by StarFive Ltd.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
> .../clock/starfive,jh7110-stgcrg.yaml | 82 +++++++++++++++++++
> .../dt-bindings/clock/starfive,jh7110-crg.h | 34 ++++++++
> .../dt-bindings/reset/starfive,jh7110-crg.h | 28 +++++++
> 3 files changed, 144 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Xingyu Wu <xingyu.wu@starfivetech.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Emil Renner Berthing <kernel@esmil.dk>
Cc: Rob Herring <robh+dt@kernel.org>, Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Hal Feng <hal.feng@starfivetech.com>,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v3 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator
Date: Wed, 15 Mar 2023 08:55:59 +0100 [thread overview]
Message-ID: <478974c3-7302-e773-8d70-fcb2323f65ea@linaro.org> (raw)
In-Reply-To: <20230314124404.117592-2-xingyu.wu@starfivetech.com>
On 14/03/2023 13:43, Xingyu Wu wrote:
> Add bindings for the System-Top-Group clock and reset generator (STGCRG)
> on the JH7110 RISC-V SoC by StarFive Ltd.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
> .../clock/starfive,jh7110-stgcrg.yaml | 82 +++++++++++++++++++
> .../dt-bindings/clock/starfive,jh7110-crg.h | 34 ++++++++
> .../dt-bindings/reset/starfive,jh7110-crg.h | 28 +++++++
> 3 files changed, 144 insertions(+)
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-03-15 7:56 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-14 12:43 [PATCH v3 00/11] Add new partial clock and reset drivers for StarFive JH7110 Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:43 ` [PATCH v3 01/11] dt-bindings: clock: Add StarFive JH7110 System-Top-Group clock and reset generator Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-15 7:55 ` Krzysztof Kozlowski [this message]
2023-03-15 7:55 ` Krzysztof Kozlowski
2023-03-14 12:43 ` [PATCH v3 02/11] reset: starfive: jh7110: Add StarFive System-Top-Group reset support Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:43 ` [PATCH v3 03/11] clk: starfive: Add StarFive JH7110 System-Top-Group clock driver Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:43 ` [PATCH v3 04/11] dt-bindings: clock: Add StarFive JH7110 Image-Signal-Process clock and reset generator Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:43 ` [PATCH v3 05/11] reset: starfive: jh7110: Add StarFive Image-Signal-Process reset support Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:43 ` [PATCH v3 06/11] clk: starfive: Add StarFive JH7110 Image-Signal-Process clock driver Xingyu Wu
2023-03-14 12:43 ` Xingyu Wu
2023-03-14 12:44 ` [PATCH v3 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator Xingyu Wu
2023-03-14 12:44 ` Xingyu Wu
2023-03-14 12:44 ` [PATCH v3 08/11] reset: starfive: jh7110: Add StarFive Video-Output reset support Xingyu Wu
2023-03-14 12:44 ` Xingyu Wu
2023-03-14 12:44 ` [PATCH v3 09/11] clk: starfive: Add StarFive JH7110 Video-Output clock driver Xingyu Wu
2023-03-14 12:44 ` Xingyu Wu
2023-03-14 12:44 ` [PATCH v3 10/11] riscv: dts: starfive: jh7110: Add DVP and HDMI TX pixel external clocks Xingyu Wu
2023-03-14 12:44 ` Xingyu Wu
2023-03-14 12:44 ` [PATCH v3 11/11] riscv: dts: starfive: jh7110: Add STGCRG/ISPCRG/VOUTCRG nodes Xingyu Wu
2023-03-14 12:44 ` Xingyu Wu
2023-03-15 0:30 ` [PATCH v3 00/11] Add new partial clock and reset drivers for StarFive JH7110 Stephen Boyd
2023-03-15 0:30 ` Stephen Boyd
2023-03-15 3:44 ` Xingyu Wu
2023-03-15 3:44 ` Xingyu Wu
2023-03-15 8:14 ` Conor Dooley
2023-03-15 8:14 ` Conor Dooley
2023-03-15 22:40 ` Stephen Boyd
2023-03-15 22:40 ` Stephen Boyd
2023-03-15 22:48 ` Conor Dooley
2023-03-15 22:48 ` Conor Dooley
2023-03-15 22:48 ` Stephen Boyd
2023-03-15 22:48 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=478974c3-7302-e773-8d70-fcb2323f65ea@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=aou@eecs.berkeley.edu \
--cc=conor@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=hal.feng@starfivetech.com \
--cc=kernel@esmil.dk \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mturquette@baylibre.com \
--cc=p.zabel@pengutronix.de \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=xingyu.wu@starfivetech.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.