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From: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Chanwoo Choi <cw00.choi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Thierry Reding
	<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jonathan Hunter
	<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Georgi Djakov
	<georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Peter De Schrijver
	<pdeschrijver-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	MyungJoo Ham
	<myungjoo.ham-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Kyungmin Park
	<kyungmin.park-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	Mikko Perttunen <cyndis-/1wQRMveznE@public.gmane.org>
Cc: "Artur Świgoń" <a.swigon-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v4 12/37] PM / devfreq: tegra20: Use MC timings for building OPP table
Date: Thu, 2 Jul 2020 08:07:19 +0300	[thread overview]
Message-ID: <4b22d3ee-f303-d81d-e261-187d4a46e749@gmail.com> (raw)
In-Reply-To: <4ea7fe00-7676-3186-8222-6e0d0eb8ed1f-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>

02.07.2020 07:18, Chanwoo Choi пишет:
> Hi Dmitry,
> 
> On 6/9/20 10:13 PM, Dmitry Osipenko wrote:
>> The clk_round_rate() won't be usable for building OPP table once
>> interconnect support will be added to the EMC driver because that CLK API
>> function limits the rounded rate based on the clk rate that is imposed by
>> active clk-users, and thus, the rounding won't work as expected if
>> interconnect will set the minimum EMC clock rate before devfreq driver is
>> loaded. The struct tegra_mc contains memory timings which could be used by
>> the devfreq driver for building up OPP table instead of rounding clock
>> rate, this patch implements this idea.
>>
>> Signed-off-by: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
>> ---
>>  drivers/devfreq/tegra20-devfreq.c | 18 +++++++++++-------
>>  1 file changed, 11 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c
>> index 6469dc69c5e0..bf504ca4dea2 100644
>> --- a/drivers/devfreq/tegra20-devfreq.c
>> +++ b/drivers/devfreq/tegra20-devfreq.c
>> @@ -123,8 +123,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  {
>>  	struct tegra_devfreq *tegra;
>>  	struct tegra_mc *mc;
>> -	unsigned long max_rate;
>> -	unsigned long rate;
>> +	unsigned int i;
>>  	int err;
>>  
>>  	mc = tegra_get_memory_controller();
>> @@ -151,12 +150,17 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  
>>  	tegra->regs = mc->regs;
>>  
>> -	max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
>> -
>> -	for (rate = 0; rate <= max_rate; rate++) {
>> -		rate = clk_round_rate(tegra->emc_clock, rate);
>> +	if (!mc->num_timings) {
> 
> Could you explain what is meaning of 'num_timing?

The num_timings is the number of memory timings defined in a
device-tree. One timing configuration per memory clock rate.

> Also, why add the opp entry in case of mc->num_timings is zero?

Timings may be not defined in some device-trees at all and in this case
memory always running on a fixed clock rate.

The devfreq driver won't be practically useful if mc->num_timings is
zero since memory frequency can't be changed, but anyways we'd want to
load the devfreq driver in order to prevent confusion about why it's not
loaded.

For example, you may ask somebody to show contents of
/sys/class/devfreq/tegra20-devfreq/trans_stat and the person says to you
that this file doesn't exist, now you'll have to figure out what
happened to the devfreq driver.

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Chanwoo Choi <cw00.choi@samsung.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>
Cc: "Artur Świgoń" <a.swigon@samsung.com>,
	linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v4 12/37] PM / devfreq: tegra20: Use MC timings for building OPP table
Date: Thu, 2 Jul 2020 08:07:19 +0300	[thread overview]
Message-ID: <4b22d3ee-f303-d81d-e261-187d4a46e749@gmail.com> (raw)
In-Reply-To: <4ea7fe00-7676-3186-8222-6e0d0eb8ed1f@samsung.com>

02.07.2020 07:18, Chanwoo Choi пишет:
> Hi Dmitry,
> 
> On 6/9/20 10:13 PM, Dmitry Osipenko wrote:
>> The clk_round_rate() won't be usable for building OPP table once
>> interconnect support will be added to the EMC driver because that CLK API
>> function limits the rounded rate based on the clk rate that is imposed by
>> active clk-users, and thus, the rounding won't work as expected if
>> interconnect will set the minimum EMC clock rate before devfreq driver is
>> loaded. The struct tegra_mc contains memory timings which could be used by
>> the devfreq driver for building up OPP table instead of rounding clock
>> rate, this patch implements this idea.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  drivers/devfreq/tegra20-devfreq.c | 18 +++++++++++-------
>>  1 file changed, 11 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c
>> index 6469dc69c5e0..bf504ca4dea2 100644
>> --- a/drivers/devfreq/tegra20-devfreq.c
>> +++ b/drivers/devfreq/tegra20-devfreq.c
>> @@ -123,8 +123,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  {
>>  	struct tegra_devfreq *tegra;
>>  	struct tegra_mc *mc;
>> -	unsigned long max_rate;
>> -	unsigned long rate;
>> +	unsigned int i;
>>  	int err;
>>  
>>  	mc = tegra_get_memory_controller();
>> @@ -151,12 +150,17 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  
>>  	tegra->regs = mc->regs;
>>  
>> -	max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
>> -
>> -	for (rate = 0; rate <= max_rate; rate++) {
>> -		rate = clk_round_rate(tegra->emc_clock, rate);
>> +	if (!mc->num_timings) {
> 
> Could you explain what is meaning of 'num_timing?

The num_timings is the number of memory timings defined in a
device-tree. One timing configuration per memory clock rate.

> Also, why add the opp entry in case of mc->num_timings is zero?

Timings may be not defined in some device-trees at all and in this case
memory always running on a fixed clock rate.

The devfreq driver won't be practically useful if mc->num_timings is
zero since memory frequency can't be changed, but anyways we'd want to
load the devfreq driver in order to prevent confusion about why it's not
loaded.

For example, you may ask somebody to show contents of
/sys/class/devfreq/tegra20-devfreq/trans_stat and the person says to you
that this file doesn't exist, now you'll have to figure out what
happened to the devfreq driver.

WARNING: multiple messages have this Message-ID (diff)
From: Dmitry Osipenko <digetx@gmail.com>
To: Chanwoo Choi <cw00.choi@samsung.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Georgi Djakov <georgi.djakov@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	MyungJoo Ham <myungjoo.ham@samsung.com>,
	Kyungmin Park <kyungmin.park@samsung.com>,
	Mikko Perttunen <cyndis@kapsi.fi>
Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	"Artur Świgoń" <a.swigon@samsung.com>,
	linux-tegra@vger.kernel.org
Subject: Re: [PATCH v4 12/37] PM / devfreq: tegra20: Use MC timings for building OPP table
Date: Thu, 2 Jul 2020 08:07:19 +0300	[thread overview]
Message-ID: <4b22d3ee-f303-d81d-e261-187d4a46e749@gmail.com> (raw)
In-Reply-To: <4ea7fe00-7676-3186-8222-6e0d0eb8ed1f@samsung.com>

02.07.2020 07:18, Chanwoo Choi пишет:
> Hi Dmitry,
> 
> On 6/9/20 10:13 PM, Dmitry Osipenko wrote:
>> The clk_round_rate() won't be usable for building OPP table once
>> interconnect support will be added to the EMC driver because that CLK API
>> function limits the rounded rate based on the clk rate that is imposed by
>> active clk-users, and thus, the rounding won't work as expected if
>> interconnect will set the minimum EMC clock rate before devfreq driver is
>> loaded. The struct tegra_mc contains memory timings which could be used by
>> the devfreq driver for building up OPP table instead of rounding clock
>> rate, this patch implements this idea.
>>
>> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
>> ---
>>  drivers/devfreq/tegra20-devfreq.c | 18 +++++++++++-------
>>  1 file changed, 11 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/devfreq/tegra20-devfreq.c b/drivers/devfreq/tegra20-devfreq.c
>> index 6469dc69c5e0..bf504ca4dea2 100644
>> --- a/drivers/devfreq/tegra20-devfreq.c
>> +++ b/drivers/devfreq/tegra20-devfreq.c
>> @@ -123,8 +123,7 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  {
>>  	struct tegra_devfreq *tegra;
>>  	struct tegra_mc *mc;
>> -	unsigned long max_rate;
>> -	unsigned long rate;
>> +	unsigned int i;
>>  	int err;
>>  
>>  	mc = tegra_get_memory_controller();
>> @@ -151,12 +150,17 @@ static int tegra_devfreq_probe(struct platform_device *pdev)
>>  
>>  	tegra->regs = mc->regs;
>>  
>> -	max_rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
>> -
>> -	for (rate = 0; rate <= max_rate; rate++) {
>> -		rate = clk_round_rate(tegra->emc_clock, rate);
>> +	if (!mc->num_timings) {
> 
> Could you explain what is meaning of 'num_timing?

The num_timings is the number of memory timings defined in a
device-tree. One timing configuration per memory clock rate.

> Also, why add the opp entry in case of mc->num_timings is zero?

Timings may be not defined in some device-trees at all and in this case
memory always running on a fixed clock rate.

The devfreq driver won't be practically useful if mc->num_timings is
zero since memory frequency can't be changed, but anyways we'd want to
load the devfreq driver in order to prevent confusion about why it's not
loaded.

For example, you may ask somebody to show contents of
/sys/class/devfreq/tegra20-devfreq/trans_stat and the person says to you
that this file doesn't exist, now you'll have to figure out what
happened to the devfreq driver.
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

  parent reply	other threads:[~2020-07-02  5:07 UTC|newest]

Thread overview: 171+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-09 13:13 [PATCH v4 00/37] Introduce memory interconnect for NVIDIA Tegra SoCs Dmitry Osipenko
2020-06-09 13:13 ` Dmitry Osipenko
2020-06-09 13:13 ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 02/37] clk: tegra: Remove Memory Controller lock Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 05/37] memory: tegra30-emc: Make driver modular Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 06/37] memory: tegra124-emc: " Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 08/37] soc/tegra: fuse: Export tegra_read_ram_code() Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 09/37] memory: tegra20-emc: Initialize MC timings Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 14/37] PM / devfreq: tegra20: Add error messages to tegra_devfreq_target() Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
     [not found]   ` <20200609131404.17523-15-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  1:12     ` Chanwoo Choi
2020-07-02  1:12       ` Chanwoo Choi
2020-07-02  1:12       ` Chanwoo Choi
2020-06-09 13:13 ` [PATCH v4 15/37] PM / devfreq: tegra30: " Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
     [not found]   ` <20200609131404.17523-16-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  1:12     ` Chanwoo Choi
2020-07-02  1:12       ` Chanwoo Choi
2020-07-02  1:12       ` Chanwoo Choi
2020-06-09 13:13 ` [PATCH v4 16/37] PM / devfreq: tegra20: Adjust clocks conversion ratio and polling interval Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
     [not found]   ` <20200609131404.17523-17-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  1:37     ` Chanwoo Choi
2020-07-02  1:37       ` Chanwoo Choi
2020-07-02  1:37       ` Chanwoo Choi
2020-06-09 13:13 ` [PATCH v4 19/37] dt-bindings: memory: tegra20: emc: Document new interconnect property Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
     [not found] ` <20200609131404.17523-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-06-09 13:13   ` [PATCH v4 01/37] clk: Export clk_hw_reparent() Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 03/37] clk: tegra: Export Tegra20 EMC kernel symbols Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 04/37] memory: tegra20-emc: Make driver modular Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 07/37] memory: tegra124-emc: Use devm_platform_ioremap_resource Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 10/37] PM / devfreq: tegra20: Silence deferred probe error Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-11-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  0:56       ` Chanwoo Choi
2020-07-02  0:56         ` Chanwoo Choi
2020-07-02  0:56         ` Chanwoo Choi
     [not found]         ` <14271aed-5fb6-14e1-3fe9-ef8d0c5013c4-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2020-07-02  1:35           ` Chanwoo Choi
2020-07-02  1:35             ` Chanwoo Choi
2020-07-02  1:35             ` Chanwoo Choi
2020-06-09 13:13   ` [PATCH v4 11/37] PM / devfreq: tegra30: " Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-12-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  0:59       ` Chanwoo Choi
2020-07-02  0:59         ` Chanwoo Choi
2020-07-02  0:59         ` Chanwoo Choi
     [not found]         ` <136b430d-2097-7b2b-d7dd-b438deee8f5d-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2020-07-02  1:20           ` Dmitry Osipenko
2020-07-02  1:20             ` Dmitry Osipenko
2020-07-02  1:20             ` Dmitry Osipenko
2020-07-02  1:34             ` Chanwoo Choi
2020-07-02  1:34               ` Chanwoo Choi
     [not found]               ` <8e941321-5da6-e9e7-6a4e-8c0477911ebd-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2020-07-02  1:25                 ` Dmitry Osipenko
2020-07-02  1:25                   ` Dmitry Osipenko
2020-07-02  1:25                   ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 12/37] PM / devfreq: tegra20: Use MC timings for building OPP table Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-13-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  4:18       ` Chanwoo Choi
2020-07-02  4:18         ` Chanwoo Choi
2020-07-02  4:18         ` Chanwoo Choi
     [not found]         ` <4ea7fe00-7676-3186-8222-6e0d0eb8ed1f-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2020-07-02  5:07           ` Dmitry Osipenko [this message]
2020-07-02  5:07             ` Dmitry Osipenko
2020-07-02  5:07             ` Dmitry Osipenko
     [not found]             ` <4b22d3ee-f303-d81d-e261-187d4a46e749-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  5:30               ` Chanwoo Choi
2020-07-02  5:30                 ` Chanwoo Choi
2020-07-02  5:30                 ` Chanwoo Choi
     [not found]                 ` <2069fb51-f043-795d-7768-0024fc9a9f4e-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2020-07-02  5:43                   ` Dmitry Osipenko
2020-07-02  5:43                     ` Dmitry Osipenko
2020-07-02  5:43                     ` Dmitry Osipenko
     [not found]                     ` <7988b6cf-e60c-7e5c-ffc3-8075c20af3d3-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  5:53                       ` Dmitry Osipenko
2020-07-02  5:53                         ` Dmitry Osipenko
2020-07-02  5:53                         ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 13/37] PM / devfreq: tegra30: " Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 17/37] PM / devfreq: tegra20: Relax Kconfig dependency Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-18-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02  2:10       ` Chanwoo Choi
2020-07-02  2:10         ` Chanwoo Choi
2020-07-02  2:10         ` Chanwoo Choi
2020-06-09 13:13   ` [PATCH v4 18/37] dt-bindings: memory: tegra20: mc: Document new interconnect property Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 20/37] dt-bindings: memory: tegra30: " Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 21/37] dt-bindings: memory: tegra30: emc: " Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 22/37] dt-bindings: host1x: Document new interconnect properties Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-23-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-06-17 21:37       ` Rob Herring
2020-06-17 21:37         ` Rob Herring
2020-06-17 21:37         ` Rob Herring
2020-06-17 21:44         ` Dmitry Osipenko
2020-06-17 21:44           ` Dmitry Osipenko
2020-06-17 21:44           ` Dmitry Osipenko
     [not found]           ` <5303317a-2cb6-d7a8-361a-30867fc6eab7-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-06-17 21:48             ` Dmitry Osipenko
2020-06-17 21:48               ` Dmitry Osipenko
2020-06-17 21:48               ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 23/37] dt-bindings: memory: tegra20: Add memory client IDs Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 25/37] ARM: tegra: Add interconnect properties to Tegra20 device-tree Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 26/37] ARM: tegra: Add interconnect properties to Tegra30 device-tree Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 27/37] interconnect: Relax requirement in of_icc_get_from_provider() Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-28-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-01 17:10       ` Georgi Djakov
2020-07-01 17:10         ` Georgi Djakov
2020-07-01 17:10         ` Georgi Djakov
     [not found]         ` <3b410ea3-26d3-6f7a-213c-40dbabbde8d1-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2020-07-01 23:41           ` Dmitry Osipenko
2020-07-01 23:41             ` Dmitry Osipenko
2020-07-01 23:41             ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 28/37] memory: tegra: Register as interconnect provider Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
     [not found]     ` <20200609131404.17523-29-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-01 17:12       ` Georgi Djakov
2020-07-01 17:12         ` Georgi Djakov
2020-07-01 17:12         ` Georgi Djakov
     [not found]         ` <aec831a6-a7ad-6bcc-4e15-c44582f7568e-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2020-07-01 23:36           ` Dmitry Osipenko
2020-07-01 23:36             ` Dmitry Osipenko
2020-07-01 23:36             ` Dmitry Osipenko
     [not found]             ` <82d27a47-f189-6609-a584-c9ca1b35a76c-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-02 12:36               ` Georgi Djakov
2020-07-02 12:36                 ` Georgi Djakov
2020-07-02 12:36                 ` Georgi Djakov
2020-07-03  8:41                 ` Dmitry Osipenko
2020-07-03  8:41                   ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 30/37] memory: tegra20-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 31/37] memory: tegra20-emc: Register as interconnect provider Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13   ` [PATCH v4 32/37] memory: tegra20-emc: Create tegra20-devfreq device Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:13     ` Dmitry Osipenko
2020-06-09 13:14   ` [PATCH v4 33/37] memory: tegra30-emc: Continue probing if timings are missing in device-tree Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:14   ` [PATCH v4 36/37] drm/tegra: dc: Tune up high priority request controls for Tegra20 Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:14   ` [PATCH v4 37/37] drm/tegra: dc: Extend debug stats with total number of events Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:14     ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 24/37] dt-bindings: memory: tegra30: Add memory client IDs Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:13 ` [PATCH v4 29/37] memory: tegra20-emc: Use devm_platform_ioremap_resource Dmitry Osipenko
2020-06-09 13:13   ` Dmitry Osipenko
2020-06-09 13:14 ` [PATCH v4 34/37] memory: tegra30-emc: Register as interconnect provider Dmitry Osipenko
2020-06-09 13:14   ` Dmitry Osipenko
2020-06-09 13:14 ` [PATCH v4 35/37] drm/tegra: dc: Support memory bandwidth management Dmitry Osipenko
2020-06-09 13:14   ` Dmitry Osipenko

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