From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Andrew Jones <drjones@redhat.com>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
Marc Zyngier <marc.zyngier@arm.com>,
Christoffer Dall <christoffer.dall@linaro.org>,
arm-mail-list <linux-arm-kernel@lists.infradead.org>,
kvm-devel <kvm@vger.kernel.org>,
"Will Deacon" <will.deacon@arm.com>, Wei Huang <wei@redhat.com>,
"Christopher Covington" <cov@codeaurora.org>,
Shannon Zhao <shannon.zhao@linaro.org>,
"Huangpeng (Peter)" <peter.huangpeng@huawei.com>,
<hangaohuai@huawei.com>
Subject: Re: [PATCH v9 19/21] KVM: ARM64: Add a new feature bit for PMUv3
Date: Tue, 26 Jan 2016 11:40:25 +0800 [thread overview]
Message-ID: <56A6EAA9.3010506@huawei.com> (raw)
In-Reply-To: <CAFEAcA_fyEp3tihjbCyQBzU6vex4273Sp78J4Kg1UXkkyX+1Pg@mail.gmail.com>
On 2016/1/26 0:47, Peter Maydell wrote:
> On 19 January 2016 at 07:10, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
>> > Yes, for checking the CAP true/false is enough. Maybe I think the number
>> > of host counters could be useful for QEMU to know the number and for
>> > supporting cross-type vcpu, but I'm not sure. If someone else has no
>> > other suggestion, I will change it to what you suggest.
> Do we care about the number of host counters?
Currently we don't care about it. Anyway it could be added if it's
necessary in the future.
> We might want to
> know how many counters the guest sees, but we can do that by
> using KVM_GET_ONE_REG to look at the guest PMCR_EL0, right?
Yes, right.
--
Shannon
WARNING: multiple messages have this Message-ID (diff)
From: Shannon Zhao <zhaoshenglong@huawei.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: Andrew Jones <drjones@redhat.com>,
"kvmarm@lists.cs.columbia.edu" <kvmarm@lists.cs.columbia.edu>,
Marc Zyngier <marc.zyngier@arm.com>,
Christoffer Dall <christoffer.dall@linaro.org>,
arm-mail-list <linux-arm-kernel@lists.infradead.org>,
kvm-devel <kvm@vger.kernel.org>,
Will Deacon <will.deacon@arm.com>, Wei Huang <wei@redhat.com>,
Christopher Covington <cov@codeaurora.org>,
Shannon Zhao <shannon.zhao@linaro.org>,
"Huangpeng (Peter)" <peter.huangpeng@huawei.com>,
hangaohuai@huawei.com
Subject: Re: [PATCH v9 19/21] KVM: ARM64: Add a new feature bit for PMUv3
Date: Tue, 26 Jan 2016 11:40:25 +0800 [thread overview]
Message-ID: <56A6EAA9.3010506@huawei.com> (raw)
In-Reply-To: <CAFEAcA_fyEp3tihjbCyQBzU6vex4273Sp78J4Kg1UXkkyX+1Pg@mail.gmail.com>
On 2016/1/26 0:47, Peter Maydell wrote:
> On 19 January 2016 at 07:10, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
>> > Yes, for checking the CAP true/false is enough. Maybe I think the number
>> > of host counters could be useful for QEMU to know the number and for
>> > supporting cross-type vcpu, but I'm not sure. If someone else has no
>> > other suggestion, I will change it to what you suggest.
> Do we care about the number of host counters?
Currently we don't care about it. Anyway it could be added if it's
necessary in the future.
> We might want to
> know how many counters the guest sees, but we can do that by
> using KVM_GET_ONE_REG to look at the guest PMCR_EL0, right?
Yes, right.
--
Shannon
WARNING: multiple messages have this Message-ID (diff)
From: zhaoshenglong@huawei.com (Shannon Zhao)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v9 19/21] KVM: ARM64: Add a new feature bit for PMUv3
Date: Tue, 26 Jan 2016 11:40:25 +0800 [thread overview]
Message-ID: <56A6EAA9.3010506@huawei.com> (raw)
In-Reply-To: <CAFEAcA_fyEp3tihjbCyQBzU6vex4273Sp78J4Kg1UXkkyX+1Pg@mail.gmail.com>
On 2016/1/26 0:47, Peter Maydell wrote:
> On 19 January 2016 at 07:10, Shannon Zhao <zhaoshenglong@huawei.com> wrote:
>> > Yes, for checking the CAP true/false is enough. Maybe I think the number
>> > of host counters could be useful for QEMU to know the number and for
>> > supporting cross-type vcpu, but I'm not sure. If someone else has no
>> > other suggestion, I will change it to what you suggest.
> Do we care about the number of host counters?
Currently we don't care about it. Anyway it could be added if it's
necessary in the future.
> We might want to
> know how many counters the guest sees, but we can do that by
> using KVM_GET_ONE_REG to look at the guest PMCR_EL0, right?
Yes, right.
--
Shannon
next prev parent reply other threads:[~2016-01-26 3:41 UTC|newest]
Thread overview: 92+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-15 6:27 [PATCH v9 00/21] KVM: ARM64: Add guest PMU support Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 01/21] ARM64: Move PMU register related defines to asm/pmu.h Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 02/21] KVM: ARM64: Define PMU data structure for each vcpu Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 03/21] KVM: ARM64: Add offset defines for PMU registers Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 04/21] KVM: ARM64: Add access handler for PMCR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 05/21] KVM: ARM64: Add access handler for PMSELR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 06/21] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 08/21] KVM: ARM64: Add access handler for event type register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 09/21] KVM: ARM64: Add access handler for event counter register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 10/21] KVM: ARM64: Add access handler for PMCNTENSET and PMCNTENCLR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 11/21] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 12/21] KVM: ARM64: Add access handler for PMOVSSET and PMOVSCLR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 13/21] KVM: ARM64: Add access handler for PMSWINC register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 14/21] KVM: ARM64: Add helper to handle PMCR register bits Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 15/21] KVM: ARM64: Add access handler for PMUSERENR register Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 16/21] KVM: ARM64: Add PMU overflow interrupt routing Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 17/21] KVM: ARM64: Reset PMU state when resetting vcpu Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 18/21] KVM: ARM64: Free perf event of PMU when destroying vcpu Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 19/21] KVM: ARM64: Add a new feature bit for PMUv3 Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 11:08 ` Andrew Jones
2016-01-15 11:08 ` Andrew Jones
2016-01-19 7:10 ` Shannon Zhao
2016-01-19 7:10 ` Shannon Zhao
2016-01-25 16:47 ` Peter Maydell
2016-01-25 16:47 ` Peter Maydell
2016-01-26 3:40 ` Shannon Zhao [this message]
2016-01-26 3:40 ` Shannon Zhao
2016-01-26 3:40 ` Shannon Zhao
2016-01-15 6:27 ` [PATCH v9 20/21] KVM: ARM: Introduce per-vcpu kvm device controls Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 11:16 ` Andrew Jones
2016-01-15 11:16 ` Andrew Jones
2016-01-15 6:27 ` [PATCH v9 21/21] KVM: ARM64: Add a new vcpu device control group for PMUv3 Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 6:27 ` Shannon Zhao
2016-01-15 13:28 ` Andrew Jones
2016-01-15 13:28 ` Andrew Jones
2016-01-15 13:58 ` Shannon Zhao
2016-01-15 13:58 ` Shannon Zhao
2016-01-25 16:53 ` Peter Maydell
2016-01-25 16:53 ` Peter Maydell
2016-01-26 3:33 ` Shannon Zhao
2016-01-26 3:33 ` Shannon Zhao
2016-01-26 3:33 ` Shannon Zhao
2016-01-15 13:45 ` [PATCH v9 00/21] KVM: ARM64: Add guest PMU support Andrew Jones
2016-01-15 13:45 ` Andrew Jones
2016-01-15 14:04 ` Shannon Zhao
2016-01-15 14:04 ` Shannon Zhao
2016-01-16 7:33 ` Shannon Zhao
2016-01-16 7:33 ` Shannon Zhao
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