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From: Keqian Zhu <zhukeqian1@huawei.com>
To: Eric Auger <eric.auger@redhat.com>, <eric.auger.pro@gmail.com>,
	<iommu@lists.linux-foundation.org>,
	<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
	<kvmarm@lists.cs.columbia.edu>, <will@kernel.org>,
	<maz@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<alex.williamson@redhat.com>, <tn@semihalf.com>
Cc: <jacob.jun.pan@linux.intel.com>, <yi.l.liu@intel.com>,
	<wangxingang5@huawei.com>, <jiangkunkun@huawei.com>,
	<jean-philippe@linaro.org>, <zhangfei.gao@linaro.org>,
	<zhangfei.gao@gmail.com>, <vivek.gautam@arm.com>,
	<shameerali.kolothum.thodi@huawei.com>, <yuzenghui@huawei.com>,
	<nicoleotsuka@gmail.com>, <lushenming@huawei.com>,
	<vsethi@nvidia.com>
Subject: Re: [PATCH v14 05/13] iommu/smmuv3: Implement attach/detach_pasid_table
Date: Tue, 2 Mar 2021 16:35:15 +0800	[thread overview]
Message-ID: <5a22a597-0fba-edcc-bcf0-50d92346af08@huawei.com> (raw)
In-Reply-To: <20210223205634.604221-6-eric.auger@redhat.com>

Hi Eric,

On 2021/2/24 4:56, Eric Auger wrote:
> On attach_pasid_table() we program STE S1 related info set
> by the guest into the actual physical STEs. At minimum
> we need to program the context descriptor GPA and compute
> whether the stage1 is translated/bypassed or aborted.
> 
> On detach, the stage 1 config is unset and the abort flag is
> unset.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
[...]

> +
> +		/*
> +		 * we currently support a single CD so s1fmt and s1dss
> +		 * fields are also ignored
> +		 */
> +		if (cfg->pasid_bits)
> +			goto out;
> +
> +		smmu_domain->s1_cfg.cdcfg.cdtab_dma = cfg->base_ptr;
only the "cdtab_dma" field of "cdcfg" is set, we are not able to locate a specific cd using arm_smmu_get_cd_ptr().

Maybe we'd better use a specialized function to fill other fields of "cdcfg" or add a sanity check in arm_smmu_get_cd_ptr()
to prevent calling it under nested mode?

As now we just call arm_smmu_get_cd_ptr() during finalise_s1(), no problem found. Just a suggestion ;-)

Thanks,
Keqian


> +		smmu_domain->s1_cfg.set = true;
> +		smmu_domain->abort = false;
> +		break;
> +	default:
> +		goto out;
> +	}
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +	ret = 0;
> +out:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +	return ret;
> +}
> +
> +static void arm_smmu_detach_pasid_table(struct iommu_domain *domain)
> +{
> +	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> +	struct arm_smmu_master *master;
> +	unsigned long flags;
> +
> +	mutex_lock(&smmu_domain->init_mutex);
> +
> +	if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
> +		goto unlock;
> +
> +	smmu_domain->s1_cfg.set = false;
> +	smmu_domain->abort = false;
> +
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +
> +unlock:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +}
> +
>  static bool arm_smmu_dev_has_feature(struct device *dev,
>  				     enum iommu_dev_features feat)
>  {
> @@ -2939,6 +3026,8 @@ static struct iommu_ops arm_smmu_ops = {
>  	.of_xlate		= arm_smmu_of_xlate,
>  	.get_resv_regions	= arm_smmu_get_resv_regions,
>  	.put_resv_regions	= generic_iommu_put_resv_regions,
> +	.attach_pasid_table	= arm_smmu_attach_pasid_table,
> +	.detach_pasid_table	= arm_smmu_detach_pasid_table,
>  	.dev_has_feat		= arm_smmu_dev_has_feature,
>  	.dev_feat_enabled	= arm_smmu_dev_feature_enabled,
>  	.dev_enable_feat	= arm_smmu_dev_enable_feature,
> 

WARNING: multiple messages have this Message-ID (diff)
From: Keqian Zhu <zhukeqian1@huawei.com>
To: Eric Auger <eric.auger@redhat.com>, <eric.auger.pro@gmail.com>,
	<iommu@lists.linux-foundation.org>,
	<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
	<kvmarm@lists.cs.columbia.edu>, <will@kernel.org>,
	<maz@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<alex.williamson@redhat.com>, <tn@semihalf.com>
Cc: jean-philippe@linaro.org, wangxingang5@huawei.com,
	lushenming@huawei.com, jiangkunkun@huawei.com,
	vivek.gautam@arm.com, vsethi@nvidia.com, zhangfei.gao@linaro.org
Subject: Re: [PATCH v14 05/13] iommu/smmuv3: Implement attach/detach_pasid_table
Date: Tue, 2 Mar 2021 16:35:15 +0800	[thread overview]
Message-ID: <5a22a597-0fba-edcc-bcf0-50d92346af08@huawei.com> (raw)
In-Reply-To: <20210223205634.604221-6-eric.auger@redhat.com>

Hi Eric,

On 2021/2/24 4:56, Eric Auger wrote:
> On attach_pasid_table() we program STE S1 related info set
> by the guest into the actual physical STEs. At minimum
> we need to program the context descriptor GPA and compute
> whether the stage1 is translated/bypassed or aborted.
> 
> On detach, the stage 1 config is unset and the abort flag is
> unset.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
[...]

> +
> +		/*
> +		 * we currently support a single CD so s1fmt and s1dss
> +		 * fields are also ignored
> +		 */
> +		if (cfg->pasid_bits)
> +			goto out;
> +
> +		smmu_domain->s1_cfg.cdcfg.cdtab_dma = cfg->base_ptr;
only the "cdtab_dma" field of "cdcfg" is set, we are not able to locate a specific cd using arm_smmu_get_cd_ptr().

Maybe we'd better use a specialized function to fill other fields of "cdcfg" or add a sanity check in arm_smmu_get_cd_ptr()
to prevent calling it under nested mode?

As now we just call arm_smmu_get_cd_ptr() during finalise_s1(), no problem found. Just a suggestion ;-)

Thanks,
Keqian


> +		smmu_domain->s1_cfg.set = true;
> +		smmu_domain->abort = false;
> +		break;
> +	default:
> +		goto out;
> +	}
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +	ret = 0;
> +out:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +	return ret;
> +}
> +
> +static void arm_smmu_detach_pasid_table(struct iommu_domain *domain)
> +{
> +	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> +	struct arm_smmu_master *master;
> +	unsigned long flags;
> +
> +	mutex_lock(&smmu_domain->init_mutex);
> +
> +	if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
> +		goto unlock;
> +
> +	smmu_domain->s1_cfg.set = false;
> +	smmu_domain->abort = false;
> +
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +
> +unlock:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +}
> +
>  static bool arm_smmu_dev_has_feature(struct device *dev,
>  				     enum iommu_dev_features feat)
>  {
> @@ -2939,6 +3026,8 @@ static struct iommu_ops arm_smmu_ops = {
>  	.of_xlate		= arm_smmu_of_xlate,
>  	.get_resv_regions	= arm_smmu_get_resv_regions,
>  	.put_resv_regions	= generic_iommu_put_resv_regions,
> +	.attach_pasid_table	= arm_smmu_attach_pasid_table,
> +	.detach_pasid_table	= arm_smmu_detach_pasid_table,
>  	.dev_has_feat		= arm_smmu_dev_has_feature,
>  	.dev_feat_enabled	= arm_smmu_dev_feature_enabled,
>  	.dev_enable_feat	= arm_smmu_dev_enable_feature,
> 
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

WARNING: multiple messages have this Message-ID (diff)
From: Keqian Zhu <zhukeqian1@huawei.com>
To: Eric Auger <eric.auger@redhat.com>, <eric.auger.pro@gmail.com>,
	<iommu@lists.linux-foundation.org>,
	<linux-kernel@vger.kernel.org>, <kvm@vger.kernel.org>,
	<kvmarm@lists.cs.columbia.edu>, <will@kernel.org>,
	<maz@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
	<alex.williamson@redhat.com>, <tn@semihalf.com>
Cc: jean-philippe@linaro.org, jacob.jun.pan@linux.intel.com,
	wangxingang5@huawei.com, lushenming@huawei.com,
	nicoleotsuka@gmail.com, vivek.gautam@arm.com, yi.l.liu@intel.com,
	vsethi@nvidia.com, zhangfei.gao@linaro.org
Subject: Re: [PATCH v14 05/13] iommu/smmuv3: Implement attach/detach_pasid_table
Date: Tue, 2 Mar 2021 16:35:15 +0800	[thread overview]
Message-ID: <5a22a597-0fba-edcc-bcf0-50d92346af08@huawei.com> (raw)
In-Reply-To: <20210223205634.604221-6-eric.auger@redhat.com>

Hi Eric,

On 2021/2/24 4:56, Eric Auger wrote:
> On attach_pasid_table() we program STE S1 related info set
> by the guest into the actual physical STEs. At minimum
> we need to program the context descriptor GPA and compute
> whether the stage1 is translated/bypassed or aborted.
> 
> On detach, the stage 1 config is unset and the abort flag is
> unset.
> 
> Signed-off-by: Eric Auger <eric.auger@redhat.com>
> 
[...]

> +
> +		/*
> +		 * we currently support a single CD so s1fmt and s1dss
> +		 * fields are also ignored
> +		 */
> +		if (cfg->pasid_bits)
> +			goto out;
> +
> +		smmu_domain->s1_cfg.cdcfg.cdtab_dma = cfg->base_ptr;
only the "cdtab_dma" field of "cdcfg" is set, we are not able to locate a specific cd using arm_smmu_get_cd_ptr().

Maybe we'd better use a specialized function to fill other fields of "cdcfg" or add a sanity check in arm_smmu_get_cd_ptr()
to prevent calling it under nested mode?

As now we just call arm_smmu_get_cd_ptr() during finalise_s1(), no problem found. Just a suggestion ;-)

Thanks,
Keqian


> +		smmu_domain->s1_cfg.set = true;
> +		smmu_domain->abort = false;
> +		break;
> +	default:
> +		goto out;
> +	}
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +	ret = 0;
> +out:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +	return ret;
> +}
> +
> +static void arm_smmu_detach_pasid_table(struct iommu_domain *domain)
> +{
> +	struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain);
> +	struct arm_smmu_master *master;
> +	unsigned long flags;
> +
> +	mutex_lock(&smmu_domain->init_mutex);
> +
> +	if (smmu_domain->stage != ARM_SMMU_DOMAIN_NESTED)
> +		goto unlock;
> +
> +	smmu_domain->s1_cfg.set = false;
> +	smmu_domain->abort = false;
> +
> +	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
> +	list_for_each_entry(master, &smmu_domain->devices, domain_head)
> +		arm_smmu_install_ste_for_dev(master);
> +	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
> +
> +unlock:
> +	mutex_unlock(&smmu_domain->init_mutex);
> +}
> +
>  static bool arm_smmu_dev_has_feature(struct device *dev,
>  				     enum iommu_dev_features feat)
>  {
> @@ -2939,6 +3026,8 @@ static struct iommu_ops arm_smmu_ops = {
>  	.of_xlate		= arm_smmu_of_xlate,
>  	.get_resv_regions	= arm_smmu_get_resv_regions,
>  	.put_resv_regions	= generic_iommu_put_resv_regions,
> +	.attach_pasid_table	= arm_smmu_attach_pasid_table,
> +	.detach_pasid_table	= arm_smmu_detach_pasid_table,
>  	.dev_has_feat		= arm_smmu_dev_has_feature,
>  	.dev_feat_enabled	= arm_smmu_dev_feature_enabled,
>  	.dev_enable_feat	= arm_smmu_dev_enable_feature,
> 
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

  reply	other threads:[~2021-03-02  9:35 UTC|newest]

Thread overview: 140+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-23 20:56 [PATCH v14 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2021-02-23 20:56 ` Eric Auger
2021-02-23 20:56 ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 01/13] iommu: Introduce attach/detach_pasid_table API Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 02/13] iommu: Introduce bind/unbind_guest_msi Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 03/13] iommu/smmuv3: Allow s1 and s2 configs to coexist Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 04/13] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 05/13] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-03-02  8:35   ` Keqian Zhu [this message]
2021-03-02  8:35     ` Keqian Zhu
2021-03-02  8:35     ` Keqian Zhu
2021-03-19 13:15     ` Auger Eric
2021-03-19 13:15       ` Auger Eric
2021-03-19 13:15       ` Auger Eric
2021-03-22  6:23       ` Keqian Zhu
2021-03-22  6:23         ` Keqian Zhu
2021-03-22  6:23         ` Keqian Zhu
2021-02-23 20:56 ` [PATCH v14 06/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-03-30  9:17   ` Zenghui Yu
2021-03-30  9:17     ` Zenghui Yu
2021-03-30  9:17     ` Zenghui Yu
2021-04-01  9:38     ` Auger Eric
2021-04-01  9:38       ` Auger Eric
2021-04-01  9:38       ` Auger Eric
2021-04-01 12:37   ` Kunkun Jiang
2021-04-01 12:37     ` Kunkun Jiang
2021-04-01 12:37     ` Kunkun Jiang
2021-04-08 12:30     ` Auger Eric
2021-04-08 12:30       ` Auger Eric
2021-04-08 12:30       ` Auger Eric
2021-04-09  4:48       ` Kunkun Jiang
2021-04-09  4:48         ` Kunkun Jiang
2021-04-09  4:48         ` Kunkun Jiang
2021-04-09  8:31         ` Auger Eric
2021-04-09  8:31           ` Auger Eric
2021-04-09  8:31           ` Auger Eric
2021-04-09  9:43           ` Kunkun Jiang
2021-04-09  9:43             ` Kunkun Jiang
2021-04-09  9:43             ` Kunkun Jiang
2021-02-23 20:56 ` [PATCH v14 07/13] iommu/smmuv3: Implement cache_invalidate Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-03-04  7:55   ` chenxiang (M)
2021-03-04  7:55     ` chenxiang (M)
2021-03-19 17:36     ` Auger Eric
2021-03-19 17:36       ` Auger Eric
2021-03-19 17:36       ` Auger Eric
2021-03-22  6:40       ` [Linuxarm] " chenxiang (M)
2021-03-22  6:40         ` chenxiang (M)
2021-03-22  6:40         ` chenxiang (M)
2021-03-22  9:05         ` Auger Eric
2021-03-22  9:05           ` Auger Eric
2021-03-22  9:05           ` Auger Eric
2021-03-23  1:28           ` chenxiang (M)
2021-03-23  1:28             ` chenxiang (M)
2021-03-23  1:28             ` chenxiang (M)
2021-04-01  6:11   ` Zenghui Yu
2021-04-01  6:11     ` Zenghui Yu
2021-04-01  6:11     ` Zenghui Yu
2021-04-01 12:06     ` Auger Eric
2021-04-01 12:06       ` Auger Eric
2021-04-01 12:06       ` Auger Eric
2021-02-23 20:56 ` [PATCH v14 08/13] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-04-07  7:39   ` Zenghui Yu
2021-04-07  7:39     ` Zenghui Yu
2021-04-07  7:39     ` Zenghui Yu
2021-04-10 13:34     ` Auger Eric
2021-04-10 13:34       ` Auger Eric
2021-04-10 13:34       ` Auger Eric
2021-02-23 20:56 ` [PATCH v14 09/13] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 10/13] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 11/13] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 12/13] iommu/smmuv3: report additional recoverable faults Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56 ` [PATCH v14 13/13] iommu/smmuv3: Accept configs with more than one context descriptor Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-02-23 20:56   ` Eric Auger
2021-03-30  9:23   ` Zenghui Yu
2021-03-30  9:23     ` Zenghui Yu
2021-03-30  9:23     ` Zenghui Yu
2021-04-01 11:48     ` Auger Eric
2021-04-01 11:48       ` Auger Eric
2021-04-01 11:48       ` Auger Eric
2021-04-01 12:38       ` Shameerali Kolothum Thodi
2021-04-01 12:38         ` Shameerali Kolothum Thodi
2021-04-01 12:38         ` Shameerali Kolothum Thodi
2021-04-01 13:20         ` Auger Eric
2021-04-01 13:20           ` Auger Eric
2021-04-01 13:20           ` Auger Eric
2021-02-25 16:06 ` [PATCH v14 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Auger Eric
2021-02-25 16:06   ` Auger Eric
2021-02-25 16:06   ` Auger Eric
2021-04-22 15:04   ` Sumit Gupta
2021-04-22 15:04     ` Sumit Gupta
2021-04-22 15:04     ` Sumit Gupta
2021-04-23 13:00     ` Jean-Philippe Brucker
2021-04-23 13:00       ` Jean-Philippe Brucker
2021-04-23 13:00       ` Jean-Philippe Brucker
2021-04-23 17:16       ` Sumit Gupta
2021-04-23 17:16         ` Sumit Gupta
2021-04-23 17:16         ` Sumit Gupta
2021-04-23 17:58         ` Krishna Reddy
2021-04-23 17:58           ` Krishna Reddy
2021-04-23 17:58           ` Krishna Reddy
2021-04-23 18:19           ` Sumit Gupta
2021-04-23 18:19             ` Sumit Gupta
2021-04-23 18:19             ` Sumit Gupta
2021-04-24  9:06           ` Marc Zyngier
2021-04-24  9:06             ` Marc Zyngier
2021-04-24  9:06             ` Marc Zyngier
2021-04-24 11:29             ` Sumit Gupta
2021-04-24 11:29               ` Sumit Gupta
2021-04-24 11:29               ` Sumit Gupta
2021-03-18  0:16 ` Krishna Reddy
2021-03-18  0:16   ` Krishna Reddy
2021-03-18  0:16   ` Krishna Reddy
2021-03-19 13:17   ` Auger Eric
2021-03-19 13:17     ` Auger Eric
2021-03-19 13:17     ` Auger Eric

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