From: Steven Price <steven.price@arm.com> To: Catalin Marinas <catalin.marinas@arm.com>, linux-arm-kernel@lists.infradead.org Cc: linux-mm@kvack.org, linux-arch@vger.kernel.org, Will Deacon <will@kernel.org>, Dave P Martin <Dave.Martin@arm.com>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Szabolcs Nagy <szabolcs.nagy@arm.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Andrey Konovalov <andreyknvl@google.com>, Peter Collingbourne <pcc@google.com>, Andrew Morton <akpm@linux-foundation.org> Subject: Re: [PATCH v9 09/29] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Date: Thu, 10 Sep 2020 11:23:33 +0100 [thread overview] Message-ID: <5c2ebe16-2ac9-6cff-3456-6d8ac96b5fb7@arm.com> (raw) In-Reply-To: <20200904103029.32083-10-catalin.marinas@arm.com> On 04/09/2020 11:30, Catalin Marinas wrote: > Pages allocated by the kernel are not guaranteed to have the tags > zeroed, especially as the kernel does not (yet) use MTE itself. To > ensure the user can still access such pages when mapped into its address > space, clear the tags via set_pte_at(). A new page flag - PG_mte_tagged > (PG_arch_2) - is used to track pages with valid allocation tags. > > Since the zero page is mapped as pte_special(), it won't be covered by > the above set_pte_at() mechanism. Clear its tags during early MTE > initialisation. > > Co-developed-by: Steven Price <steven.price@arm.com> > Signed-off-by: Steven Price <steven.price@arm.com> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> [...] > diff --git a/arch/arm64/lib/mte.S b/arch/arm64/lib/mte.S > new file mode 100644 > index 000000000000..a36705640086 > --- /dev/null > +++ b/arch/arm64/lib/mte.S > @@ -0,0 +1,34 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2020 ARM Ltd. > + */ > +#include <linux/linkage.h> > + > +#include <asm/assembler.h> > +#include <asm/sysreg.h> > + > + .arch armv8.5-a+memtag > + > +/* > + * multitag_transfer_size - set \reg to the block size that is accessed by the > + * LDGM/STGM instructions. > + */ > + .macro multitag_transfer_size, reg, tmp > + mrs_s \reg, SYS_GMID_EL1 > + ubfx \reg, \reg, #SYS_GMID_EL1_BS_SHIFT, #SYS_GMID_EL1_BS_SIZE > + mov \tmp, #4 > + lsl \reg, \tmp, \reg > + .endm > + > +/* > + * Clear the tags in a page > + * x0 - address of the page to be cleared > + */ > +SYM_FUNC_START(mte_clear_page_tags) > + multitag_transfer_size x1, x2 > +1: stgm xzr, [x0] > + add x0, x0, x1 > + tst x0, #(PAGE_SIZE - 1) > + b.ne 1b > + ret > +SYM_FUNC_END(mte_clear_page_tags) > Could the value of SYS_GMID_EL1 vary between CPUs and do we therefore need a preempt_disable() around mte_clear_page_tags() (and other functions in later patches)? Steve
WARNING: multiple messages have this Message-ID (diff)
From: Steven Price <steven.price@arm.com> To: Catalin Marinas <catalin.marinas@arm.com>, linux-arm-kernel@lists.infradead.org Cc: linux-arch@vger.kernel.org, Szabolcs Nagy <szabolcs.nagy@arm.com>, Andrey Konovalov <andreyknvl@google.com>, Kevin Brodsky <kevin.brodsky@arm.com>, Peter Collingbourne <pcc@google.com>, linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org>, Vincenzo Frascino <vincenzo.frascino@arm.com>, Will Deacon <will@kernel.org>, Dave P Martin <Dave.Martin@arm.com> Subject: Re: [PATCH v9 09/29] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Date: Thu, 10 Sep 2020 11:23:33 +0100 [thread overview] Message-ID: <5c2ebe16-2ac9-6cff-3456-6d8ac96b5fb7@arm.com> (raw) In-Reply-To: <20200904103029.32083-10-catalin.marinas@arm.com> On 04/09/2020 11:30, Catalin Marinas wrote: > Pages allocated by the kernel are not guaranteed to have the tags > zeroed, especially as the kernel does not (yet) use MTE itself. To > ensure the user can still access such pages when mapped into its address > space, clear the tags via set_pte_at(). A new page flag - PG_mte_tagged > (PG_arch_2) - is used to track pages with valid allocation tags. > > Since the zero page is mapped as pte_special(), it won't be covered by > the above set_pte_at() mechanism. Clear its tags during early MTE > initialisation. > > Co-developed-by: Steven Price <steven.price@arm.com> > Signed-off-by: Steven Price <steven.price@arm.com> > Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> > Cc: Will Deacon <will@kernel.org> [...] > diff --git a/arch/arm64/lib/mte.S b/arch/arm64/lib/mte.S > new file mode 100644 > index 000000000000..a36705640086 > --- /dev/null > +++ b/arch/arm64/lib/mte.S > @@ -0,0 +1,34 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > +/* > + * Copyright (C) 2020 ARM Ltd. > + */ > +#include <linux/linkage.h> > + > +#include <asm/assembler.h> > +#include <asm/sysreg.h> > + > + .arch armv8.5-a+memtag > + > +/* > + * multitag_transfer_size - set \reg to the block size that is accessed by the > + * LDGM/STGM instructions. > + */ > + .macro multitag_transfer_size, reg, tmp > + mrs_s \reg, SYS_GMID_EL1 > + ubfx \reg, \reg, #SYS_GMID_EL1_BS_SHIFT, #SYS_GMID_EL1_BS_SIZE > + mov \tmp, #4 > + lsl \reg, \tmp, \reg > + .endm > + > +/* > + * Clear the tags in a page > + * x0 - address of the page to be cleared > + */ > +SYM_FUNC_START(mte_clear_page_tags) > + multitag_transfer_size x1, x2 > +1: stgm xzr, [x0] > + add x0, x0, x1 > + tst x0, #(PAGE_SIZE - 1) > + b.ne 1b > + ret > +SYM_FUNC_END(mte_clear_page_tags) > Could the value of SYS_GMID_EL1 vary between CPUs and do we therefore need a preempt_disable() around mte_clear_page_tags() (and other functions in later patches)? Steve _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-09-10 10:23 UTC|newest] Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-09-04 10:30 [PATCH v9 00/29] arm64: Memory Tagging Extension user-space support Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 01/29] arm64: mte: system register definitions Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 02/29] arm64: mte: Use Normal Tagged attributes for the linear map Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 03/29] arm64: mte: CPU feature detection and initial sysreg configuration Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 04/29] arm64: kvm: mte: Hide the MTE CPUID information from the guests Catalin Marinas 2020-09-04 10:46 ` Marc Zyngier 2020-09-04 10:46 ` Marc Zyngier 2020-09-04 10:30 ` [PATCH v9 05/29] arm64: mte: Add specific SIGSEGV codes Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 06/29] arm64: mte: Handle synchronous and asynchronous tag check faults Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 07/29] mm: Add PG_arch_2 page flag Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 08/29] mm: Preserve the PG_arch_2 flag in __split_huge_page_tail() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 09/29] arm64: mte: Clear the tags when a page is mapped in user-space with PROT_MTE Catalin Marinas 2020-09-10 10:23 ` Steven Price [this message] 2020-09-10 10:23 ` Steven Price 2020-09-10 10:52 ` Catalin Marinas 2020-09-10 10:52 ` Catalin Marinas 2020-09-10 11:12 ` Steven Price 2020-09-10 11:12 ` Steven Price 2020-09-10 11:55 ` Catalin Marinas 2020-09-10 11:55 ` Catalin Marinas 2020-09-10 12:43 ` Steven Price 2020-09-10 12:43 ` Steven Price 2020-09-04 10:30 ` [PATCH v9 10/29] arm64: mte: Tags-aware copy_{user_,}highpage() implementations Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 11/29] arm64: Avoid unnecessary clear_user_page() indirection Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 12/29] arm64: mte: Tags-aware aware memcmp_pages() implementation Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 13/29] mm: Introduce arch_calc_vm_flag_bits() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 14/29] arm64: mte: Add PROT_MTE support to mmap() and mprotect() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 15/29] mm: Introduce arch_validate_flags() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 16/29] arm64: mte: Validate the PROT_MTE request via arch_validate_flags() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 17/29] mm: Allow arm64 mmap(PROT_MTE) on RAM-based files Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 18/29] arm64: mte: Allow user control of the tag check mode via prctl() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 19/29] arm64: mte: Allow user control of the generated random tags " Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 20/29] arm64: mte: Restore the GCR_EL1 register after a suspend Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 21/29] arm64: mte: Allow {set,get}_tagged_addr_ctrl() on non-current tasks Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 22/29] arm64: mte: ptrace: Add PTRACE_{PEEK,POKE}MTETAGS support Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 23/29] arm64: mte: ptrace: Add NT_ARM_TAGGED_ADDR_CTRL regset Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 24/29] fs: Handle intra-page faults in copy_mount_options() Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 25/29] mm: Add arch hooks for saving/restoring tags Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 26/29] arm64: mte: Enable swap of tagged pages Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 27/29] arm64: mte: Save tags when hibernating Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 28/29] arm64: mte: Kconfig entry Catalin Marinas 2020-09-04 10:30 ` [PATCH v9 29/29] arm64: mte: Add Memory Tagging Extension documentation Catalin Marinas 2020-09-17 8:11 ` Will Deacon 2020-09-17 8:11 ` Will Deacon 2020-09-17 9:02 ` Catalin Marinas 2020-09-17 9:02 ` Catalin Marinas 2020-09-17 16:15 ` Dave Martin 2020-09-17 16:15 ` Dave Martin 2020-09-18 8:30 ` Will Deacon 2020-09-18 8:30 ` Will Deacon 2020-10-14 23:43 ` Peter Collingbourne 2020-10-14 23:43 ` Peter Collingbourne 2020-10-14 23:43 ` Peter Collingbourne 2020-10-15 8:57 ` Will Deacon 2020-10-15 8:57 ` Will Deacon 2020-10-15 11:14 ` Szabolcs Nagy 2020-10-15 11:14 ` Szabolcs Nagy 2020-09-22 16:04 ` Catalin Marinas 2020-09-22 16:04 ` Catalin Marinas 2020-09-22 15:52 ` Szabolcs Nagy 2020-09-22 15:52 ` Szabolcs Nagy 2020-09-22 16:55 ` Catalin Marinas 2020-09-22 16:55 ` Catalin Marinas 2020-09-23 9:10 ` Szabolcs Nagy 2020-09-23 9:10 ` Szabolcs Nagy 2020-09-22 12:22 ` Andrey Konovalov 2020-09-22 12:22 ` Andrey Konovalov 2020-09-22 12:22 ` Andrey Konovalov
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