From: "Liang, Kan" <kan.liang@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>, Like Xu <like.xu@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
ak@linux.intel.com, wei.w.wang@intel.com,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org, "Liang,
Kan" <kan.liang@intel.com>
Subject: Re: [PATCH v12 00/11] Guest Last Branch Recording Enabling
Date: Thu, 2 Jul 2020 09:11:06 -0400 [thread overview]
Message-ID: <5d3980e3-1c49-4174-4cdb-f40fc21ee6c1@linux.intel.com> (raw)
In-Reply-To: <20200702074059.GX4781@hirez.programming.kicks-ass.net>
On 7/2/2020 3:40 AM, Peter Zijlstra wrote:
> On Sat, Jun 13, 2020 at 04:09:45PM +0800, Like Xu wrote:
>> Like Xu (10):
>> perf/x86/core: Refactor hw->idx checks and cleanup
>> perf/x86/lbr: Add interface to get LBR information
>> perf/x86: Add constraint to create guest LBR event without hw counter
>> perf/x86: Keep LBR records unchanged in host context for guest usage
>
>> Wei Wang (1):
>> perf/x86: Fix variable types for LBR registers
>
>> arch/x86/events/core.c | 26 +--
>> arch/x86/events/intel/core.c | 109 ++++++++-----
>> arch/x86/events/intel/lbr.c | 51 +++++-
>> arch/x86/events/perf_event.h | 8 +-
>> arch/x86/include/asm/perf_event.h | 34 +++-
>
> These look good to me; but at the same time Kan is sending me
> Architectural LBR patches.
>
> Kan, if I take these perf patches and stick them in a tip/perf/vlbr
> topic branch, can you rebase the arch lbr stuff on top, or is there
> anything in the arch-lbr series that badly conflicts with this work?
>
Yes, I can rebase the arch lbr patches on top of them.
Please push the tip/perf/vlbr branch, so I can pull and rebase my patches.
Thanks,
Kan
next prev parent reply other threads:[~2020-07-02 13:11 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-13 8:09 [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-06-13 8:09 ` [PATCH v12 01/11] perf/x86: Fix variable types for LBR registers Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Wei Wang
2020-11-09 6:34 ` [PATCH v12 01/11] " Andi Kleen
2020-11-11 2:14 ` Xu, Like
2020-06-13 8:09 ` [PATCH v12 02/11] perf/x86/core: Refactor hw->idx checks and cleanup Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13 8:09 ` [PATCH v12 03/11] perf/x86/lbr: Add interface to get LBR information Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13 8:09 ` [PATCH v12 04/11] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-06-13 8:09 ` [PATCH v12 05/11] perf/x86: Keep LBR records unchanged in host context for guest usage Like Xu
2020-06-13 8:09 ` [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES Like Xu
2020-07-08 13:36 ` Andi Kleen
2020-07-08 14:38 ` Xu, Like
2020-06-13 8:09 ` [PATCH v12 07/11] KVM: vmx/pmu: Unmask LBR fields in the MSR_IA32_DEBUGCTLMSR emualtion Like Xu
2020-06-13 9:14 ` Xiaoyao Li
2020-06-13 9:42 ` Xu, Like
2020-07-07 20:21 ` Sean Christopherson
2020-07-08 1:37 ` Xiaoyao Li
2020-07-08 7:06 ` Xu, Like
2020-07-10 16:28 ` Sean Christopherson
2020-06-13 8:09 ` [PATCH v12 08/11] KVM: vmx/pmu: Pass-through LBR msrs when guest LBR event is scheduled Like Xu
2020-06-13 8:09 ` [PATCH v12 09/11] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI Like Xu
2020-06-13 8:09 ` [PATCH v12 10/11] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation Like Xu
2020-06-13 8:09 ` [PATCH v12 11/11] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 1/2] target/i386: define a new MSR based feature word - FEAT_PERF_CAPABILITIES Like Xu
2020-06-13 8:09 ` Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu,lbr=true support to enable guest LBR Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu, lbr=true " Like Xu
2020-06-23 13:13 ` [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-07-01 2:38 ` Like Xu
2020-07-02 7:40 ` Peter Zijlstra
2020-07-02 13:11 ` Liang, Kan [this message]
2020-07-02 13:58 ` Peter Zijlstra
2020-07-03 7:56 ` Peter Zijlstra
2020-07-03 8:04 ` Xu, Like
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=5d3980e3-1c49-4174-4cdb-f40fc21ee6c1@linux.intel.com \
--to=kan.liang@linux.intel.com \
--cc=ak@linux.intel.com \
--cc=jmattson@google.com \
--cc=joro@8bytes.org \
--cc=kan.liang@intel.com \
--cc=kvm@vger.kernel.org \
--cc=like.xu@linux.intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=pbonzini@redhat.com \
--cc=peterz@infradead.org \
--cc=sean.j.christopherson@intel.com \
--cc=vkuznets@redhat.com \
--cc=wanpengli@tencent.com \
--cc=wei.w.wang@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.