From: "Xu, Like" <like.xu@intel.com>
To: Andi Kleen <ak@linux.intel.com>, Like Xu <like.xu@linux.intel.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>,
Peter Zijlstra <peterz@infradead.org>,
Sean Christopherson <sean.j.christopherson@intel.com>,
Vitaly Kuznetsov <vkuznets@redhat.com>,
Wanpeng Li <wanpengli@tencent.com>,
Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>,
wei.w.wang@intel.com, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org
Subject: Re: [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES
Date: Wed, 8 Jul 2020 22:38:02 +0800 [thread overview]
Message-ID: <f7f87595-9cec-8512-5385-e5d746b4e886@intel.com> (raw)
In-Reply-To: <20200708133646.GM3448022@tassilo.jf.intel.com>
On 2020/7/8 21:36, Andi Kleen wrote:
>> + /*
>> + * As a first step, a guest could only enable LBR feature if its cpu
>> + * model is the same as the host because the LBR registers would
>> + * be pass-through to the guest and they're model specific.
>> + */
>> + if (boot_cpu_data.x86_model != guest_cpuid_model(vcpu))
>> + return false;
> Could we relax this in a followon patch? (after this series is merged)
Sure, there would be a follow-on patch to relax this check after it's merged.
>
> It's enough of the perf cap LBR version matches, don't need full model
> number match.
I assume you are referring to the LBR_FMT value in the perf_capabilities.
> This would require a way to configure the LBR version
> from qemu.
Sure, I may propose this configuration in the QEMU community.
>
> This would allow more flexibility, for example migration from
> Icelake to Skylake and vice versa.
Yes, we need this flexibility to cover as many platforms as possible.
Thanks,
Like Xu
>
> -Andi
next prev parent reply other threads:[~2020-07-08 14:38 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-13 8:09 [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-06-13 8:09 ` [PATCH v12 01/11] perf/x86: Fix variable types for LBR registers Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Wei Wang
2020-11-09 6:34 ` [PATCH v12 01/11] " Andi Kleen
2020-11-11 2:14 ` Xu, Like
2020-06-13 8:09 ` [PATCH v12 02/11] perf/x86/core: Refactor hw->idx checks and cleanup Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13 8:09 ` [PATCH v12 03/11] perf/x86/lbr: Add interface to get LBR information Like Xu
2020-07-03 8:01 ` [tip: perf/core] " tip-bot2 for Like Xu
2020-06-13 8:09 ` [PATCH v12 04/11] perf/x86: Add constraint to create guest LBR event without hw counter Like Xu
2020-06-13 8:09 ` [PATCH v12 05/11] perf/x86: Keep LBR records unchanged in host context for guest usage Like Xu
2020-06-13 8:09 ` [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES Like Xu
2020-07-08 13:36 ` Andi Kleen
2020-07-08 14:38 ` Xu, Like [this message]
2020-06-13 8:09 ` [PATCH v12 07/11] KVM: vmx/pmu: Unmask LBR fields in the MSR_IA32_DEBUGCTLMSR emualtion Like Xu
2020-06-13 9:14 ` Xiaoyao Li
2020-06-13 9:42 ` Xu, Like
2020-07-07 20:21 ` Sean Christopherson
2020-07-08 1:37 ` Xiaoyao Li
2020-07-08 7:06 ` Xu, Like
2020-07-10 16:28 ` Sean Christopherson
2020-06-13 8:09 ` [PATCH v12 08/11] KVM: vmx/pmu: Pass-through LBR msrs when guest LBR event is scheduled Like Xu
2020-06-13 8:09 ` [PATCH v12 09/11] KVM: vmx/pmu: Emulate legacy freezing LBRs on virtual PMI Like Xu
2020-06-13 8:09 ` [PATCH v12 10/11] KVM: vmx/pmu: Reduce the overhead of LBR pass-through or cancellation Like Xu
2020-06-13 8:09 ` [PATCH v12 11/11] KVM: vmx/pmu: Release guest LBR event via lazy release mechanism Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 1/2] target/i386: define a new MSR based feature word - FEAT_PERF_CAPABILITIES Like Xu
2020-06-13 8:09 ` Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu,lbr=true support to enable guest LBR Like Xu
2020-06-13 8:09 ` [Qemu-devel] [PATCH 2/2] target/i386: add -cpu, lbr=true " Like Xu
2020-06-23 13:13 ` [PATCH v12 00/11] Guest Last Branch Recording Enabling Like Xu
2020-07-01 2:38 ` Like Xu
2020-07-02 7:40 ` Peter Zijlstra
2020-07-02 13:11 ` Liang, Kan
2020-07-02 13:58 ` Peter Zijlstra
2020-07-03 7:56 ` Peter Zijlstra
2020-07-03 8:04 ` Xu, Like
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