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From: "Kim, Cheol Yong" <cheol.yong.kim@linux.intel.com>
To: Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	rtanwar@maxlinear.com
Cc: vigneshr@ti.com, qi-ming.wu@intel.com, cheol.yong.kim@intel.com,
	p.yadav@ti.com, linux-mtd@lists.infradead.org, "Tanwar,
	Rahul" <rahul.tanwar@linux.intel.com>,
	ckim@maxlinear.com
Subject: Re: [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC
Date: Thu, 14 Jan 2021 11:35:19 +0800	[thread overview]
Message-ID: <6916fcc9-3132-2786-5c36-de3b64721694@linux.intel.com> (raw)
In-Reply-To: <161055171029.21847.3382759454400721764.b4-ty@kernel.org>


On 1/13/2021 11:28 PM, Mark Brown wrote:
> On Tue, 24 Nov 2020 12:18:35 +0800, Ramuthevar, Vadivel MuruganX wrote:
>> Add QSPI controller support for Intel LGM SoC.
>>
>> Patches to move move bindings over to
>> "Documentation/devicetree/bindings/spi/" directory and also added compatible
>> Support for Intel platform.
>>
>> dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
>> (earlier patch mail thread and Ack-by)
>> link: "https://lore.kernel.org/lkml/5d6d1b85.1c69fb81.96938.0315@mx.google.com/"
>>
>> [...]
> Applied to
>
>     https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
>
> Thanks!
>
> [1/5] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
>        commit: ab2d28750aacb773dc42d72fbad59146e8a6db5e
> [2/5] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
>        commit: ad2775dc3fc5d30dd51984ccbaa736cc7ea9caca
> [3/5] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
>        commit: b436fb7d29bfa48ff5e00cbf413609c7a6d4d81e
> [4/5] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
>        commit: eb4aadc31ef4224b926d5165048cb297f4bda34f
> [5/5] dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
>        commit: fcebca39938fa9f6ed03f27fc75645ad7fd489e9
>
> All being well this means that it will be integrated into the linux-next
> tree (usually sometime in the next 24 hours) and sent to Linus during
> the next merge window (or sooner if it is a bug fix), however if
> problems are discovered then the patch may be dropped or reverted.
>
> You may get further e-mails resulting from automated or manual testing
> and review of the tree, please engage with people reporting problems and
> send followup patches addressing any issues that are reported if needed.
>
> If any updates are required or you are submitting further changes they
> should be sent as incremental updates against current git, existing
> patches will not be replaced.
>
> Please add any relevant lists and maintainers to the CCs when replying
> to this mail.

Thanks Mark!

Vadivel left company. Added Rahul <rtanwar@maxlinear.com> as a maintainer


>
> Thanks,
> Mark

WARNING: multiple messages have this Message-ID (diff)
From: "Kim, Cheol Yong" <cheol.yong.kim@linux.intel.com>
To: Mark Brown <broonie@kernel.org>,
	linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org,
	rtanwar@maxlinear.com
Cc: cheol.yong.kim@intel.com, vigneshr@ti.com, ckim@maxlinear.com,
	linux-mtd@lists.infradead.org, "Tanwar,
	Rahul" <rahul.tanwar@linux.intel.com>,
	qi-ming.wu@intel.com, p.yadav@ti.com
Subject: Re: [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC
Date: Thu, 14 Jan 2021 11:35:19 +0800	[thread overview]
Message-ID: <6916fcc9-3132-2786-5c36-de3b64721694@linux.intel.com> (raw)
In-Reply-To: <161055171029.21847.3382759454400721764.b4-ty@kernel.org>


On 1/13/2021 11:28 PM, Mark Brown wrote:
> On Tue, 24 Nov 2020 12:18:35 +0800, Ramuthevar, Vadivel MuruganX wrote:
>> Add QSPI controller support for Intel LGM SoC.
>>
>> Patches to move move bindings over to
>> "Documentation/devicetree/bindings/spi/" directory and also added compatible
>> Support for Intel platform.
>>
>> dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
>> (earlier patch mail thread and Ack-by)
>> link: "https://lore.kernel.org/lkml/5d6d1b85.1c69fb81.96938.0315@mx.google.com/"
>>
>> [...]
> Applied to
>
>     https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next
>
> Thanks!
>
> [1/5] spi: cadence-quadspi: Add QSPI support for Intel LGM SoC
>        commit: ab2d28750aacb773dc42d72fbad59146e8a6db5e
> [2/5] spi: cadence-quadspi: Disable the DAC for Intel LGM SoC
>        commit: ad2775dc3fc5d30dd51984ccbaa736cc7ea9caca
> [3/5] spi: cadence-quadspi: Add multi-chipselect support for Intel LGM SoC
>        commit: b436fb7d29bfa48ff5e00cbf413609c7a6d4d81e
> [4/5] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi
>        commit: eb4aadc31ef4224b926d5165048cb297f4bda34f
> [5/5] dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi
>        commit: fcebca39938fa9f6ed03f27fc75645ad7fd489e9
>
> All being well this means that it will be integrated into the linux-next
> tree (usually sometime in the next 24 hours) and sent to Linus during
> the next merge window (or sooner if it is a bug fix), however if
> problems are discovered then the patch may be dropped or reverted.
>
> You may get further e-mails resulting from automated or manual testing
> and review of the tree, please engage with people reporting problems and
> send followup patches addressing any issues that are reported if needed.
>
> If any updates are required or you are submitting further changes they
> should be sent as incremental updates against current git, existing
> patches will not be replaced.
>
> Please add any relevant lists and maintainers to the CCs when replying
> to this mail.

Thanks Mark!

Vadivel left company. Added Rahul <rtanwar@maxlinear.com> as a maintainer


>
> Thanks,
> Mark

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  reply	other threads:[~2021-01-14  3:37 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-24  4:18 [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-11-24  4:18 ` Ramuthevar, Vadivel MuruganX
2020-11-24  4:18 ` [PATCH v9 1/5] spi: cadence-quadspi: Add QSPI " Ramuthevar,Vadivel MuruganX
2020-11-24  4:18   ` Ramuthevar, Vadivel MuruganX
2020-11-24  4:18 ` [PATCH v9 2/5] spi: cadence-quadspi: Disable the DAC " Ramuthevar,Vadivel MuruganX
2020-11-24  4:18   ` Ramuthevar, Vadivel MuruganX
2020-11-24  4:18 ` [PATCH v9 3/5] spi: cadence-quadspi: Add multi-chipselect support " Ramuthevar,Vadivel MuruganX
2020-11-24  4:18   ` Ramuthevar, Vadivel MuruganX
2020-11-24  4:18 ` [PATCH v9 4/5] spi: Move cadence-quadspi.txt to Documentation/devicetree/bindings/spi Ramuthevar,Vadivel MuruganX
2020-11-24  4:18   ` Ramuthevar, Vadivel MuruganX
2020-11-24  4:18 ` [PATCH v9 5/5] dt-bindings: spi: cadence-qspi: Add support for Intel lgm-qspi Ramuthevar,Vadivel MuruganX
2020-11-24  4:18   ` Ramuthevar, Vadivel MuruganX
2021-01-13 15:28 ` [PATCH v9 0/5] spi: cadence-quadspi: Add QSPI controller support for Intel LGM SoC Mark Brown
2021-01-13 15:28   ` Mark Brown
2021-01-14  3:35   ` Kim, Cheol Yong [this message]
2021-01-14  3:35     ` Kim, Cheol Yong

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