From: Tudor Ambarus <tudor.ambarus@linaro.org> To: "André Draszik" <andre.draszik@linaro.org>, peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, kernel-team@android.com, willmcvicker@google.com, semen.protsenko@linaro.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 4/5] arm64: dts: exynos: gs101: use correct clocks for usi_uart Date: Sat, 27 Jan 2024 04:03:41 +0000 [thread overview] Message-ID: <6ccf359a-faeb-485b-8047-fa61bb1a3fc8@linaro.org> (raw) In-Reply-To: <20240127003607.501086-5-andre.draszik@linaro.org> On 1/27/24 00:35, André Draszik wrote: > Wrong pclk clocks have been used in this usi8 instance here. For USI > and UART, we need the ipclk and pclk, where pclk is the bus clock. > Without it, nothing can work. > It is unclear what exactly is using USI0_UART_CLK, but it is not > required for the IP to be operational at this stage, while pclk is. > This also brings the DT in line with the clock names expected by the > usi and uart drivers. > > Update the DTSI accordingly. > > Fixes: d97b6c902a40 ("arm64: dts: exynos: gs101: update USI UART to use peric0 clocks") > Signed-off-by: André Draszik <andre.draszik@linaro.org> > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index e5b665be2d62..f93e937d2726 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -410,7 +410,7 @@ usi_uart: usi@10a000c0 { > ranges; > #address-cells = <1>; > #size-cells = <1>; > - clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, As I said in the previous email, I don't think this is correct. This is just a heads up for Krzysztof to not pick these 2 patches yet. We'll come back on this matter on Monday. > <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; > clock-names = "pclk", "ipclk"; > samsung,sysreg = <&sysreg_peric0 0x1020>; > @@ -422,7 +422,7 @@ serial_0: serial@10a00000 { > reg = <0x10a00000 0xc0>; > interrupts = <GIC_SPI 634 > IRQ_TYPE_LEVEL_HIGH 0>; > - clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, > <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; > clock-names = "uart", "clk_uart_baud0"; > samsung,uart-fifosize = <256>; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Tudor Ambarus <tudor.ambarus@linaro.org> To: "André Draszik" <andre.draszik@linaro.org>, peter.griffin@linaro.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-kernel@vger.kernel.org, kernel-team@android.com, willmcvicker@google.com, semen.protsenko@linaro.org, alim.akhtar@samsung.com, s.nawrocki@samsung.com, tomasz.figa@gmail.com, cw00.choi@samsung.com, mturquette@baylibre.com, sboyd@kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 4/5] arm64: dts: exynos: gs101: use correct clocks for usi_uart Date: Sat, 27 Jan 2024 04:03:41 +0000 [thread overview] Message-ID: <6ccf359a-faeb-485b-8047-fa61bb1a3fc8@linaro.org> (raw) In-Reply-To: <20240127003607.501086-5-andre.draszik@linaro.org> On 1/27/24 00:35, André Draszik wrote: > Wrong pclk clocks have been used in this usi8 instance here. For USI > and UART, we need the ipclk and pclk, where pclk is the bus clock. > Without it, nothing can work. > It is unclear what exactly is using USI0_UART_CLK, but it is not > required for the IP to be operational at this stage, while pclk is. > This also brings the DT in line with the clock names expected by the > usi and uart drivers. > > Update the DTSI accordingly. > > Fixes: d97b6c902a40 ("arm64: dts: exynos: gs101: update USI UART to use peric0 clocks") > Signed-off-by: André Draszik <andre.draszik@linaro.org> > --- > arch/arm64/boot/dts/exynos/google/gs101.dtsi | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > index e5b665be2d62..f93e937d2726 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi > +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi > @@ -410,7 +410,7 @@ usi_uart: usi@10a000c0 { > ranges; > #address-cells = <1>; > #size-cells = <1>; > - clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, As I said in the previous email, I don't think this is correct. This is just a heads up for Krzysztof to not pick these 2 patches yet. We'll come back on this matter on Monday. > <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; > clock-names = "pclk", "ipclk"; > samsung,sysreg = <&sysreg_peric0 0x1020>; > @@ -422,7 +422,7 @@ serial_0: serial@10a00000 { > reg = <0x10a00000 0xc0>; > interrupts = <GIC_SPI 634 > IRQ_TYPE_LEVEL_HIGH 0>; > - clocks = <&cmu_peric0 CLK_GOUT_PERIC0_CLK_PERIC0_USI0_UART_CLK>, > + clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>, > <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>; > clock-names = "uart", "clk_uart_baud0"; > samsung,uart-fifosize = <256>;
next prev parent reply other threads:[~2024-01-27 4:04 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-27 0:35 gs101 oriole: peripheral block 0 (peric0) fixes André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 0:35 ` [PATCH 1/5] clk: samsung: gs101: gpio_peric0_pclk needs to be kept on André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 3:06 ` Sam Protsenko 2024-01-27 3:06 ` Sam Protsenko 2024-01-27 3:51 ` Tudor Ambarus 2024-01-27 3:51 ` Tudor Ambarus 2024-01-29 12:54 ` Peter Griffin 2024-01-29 12:54 ` Peter Griffin 2024-01-27 0:35 ` [PATCH 2/5] arm64: dts: exynos: gs101: fix usi8 default mode André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 3:05 ` Sam Protsenko 2024-01-27 3:05 ` Sam Protsenko 2024-01-27 3:48 ` Tudor Ambarus 2024-01-27 3:48 ` Tudor Ambarus 2024-01-29 9:48 ` Peter Griffin 2024-01-29 9:48 ` Peter Griffin 2024-01-27 0:35 ` [PATCH 3/5] arm64: dts: exynos: gs101: use correct clocks for usi8 André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 3:22 ` Sam Protsenko 2024-01-27 3:22 ` Sam Protsenko 2024-01-27 4:00 ` Tudor Ambarus 2024-01-27 4:00 ` Tudor Ambarus 2024-01-29 16:33 ` Tudor Ambarus 2024-01-29 16:33 ` Tudor Ambarus 2024-01-29 14:01 ` André Draszik 2024-01-29 14:01 ` André Draszik 2024-01-27 0:35 ` [PATCH 4/5] arm64: dts: exynos: gs101: use correct clocks for usi_uart André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 1:37 ` André Draszik 2024-01-27 1:37 ` André Draszik 2024-01-27 3:23 ` Sam Protsenko 2024-01-27 3:23 ` Sam Protsenko 2024-01-27 4:03 ` Tudor Ambarus [this message] 2024-01-27 4:03 ` Tudor Ambarus 2024-01-29 16:39 ` Tudor Ambarus 2024-01-29 16:39 ` Tudor Ambarus 2024-01-27 0:35 ` [PATCH 5/5] clk: samsung: gs101: don't mark non-essential clocks as critical André Draszik 2024-01-27 0:35 ` André Draszik 2024-01-27 1:38 ` André Draszik 2024-01-27 1:38 ` André Draszik 2024-01-27 3:30 ` Sam Protsenko 2024-01-27 3:30 ` Sam Protsenko 2024-01-29 14:37 ` André Draszik 2024-01-29 14:37 ` André Draszik 2024-01-29 19:16 ` Sam Protsenko 2024-01-29 19:16 ` Sam Protsenko 2024-01-30 9:31 ` André Draszik 2024-01-30 9:31 ` André Draszik 2024-01-30 9:39 ` Tudor Ambarus 2024-01-30 9:39 ` Tudor Ambarus 2024-01-29 16:44 ` Tudor Ambarus 2024-01-29 16:44 ` Tudor Ambarus 2024-01-27 3:01 ` gs101 oriole: peripheral block 0 (peric0) fixes Sam Protsenko 2024-01-27 3:01 ` Sam Protsenko
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