From: "Heiko Stübner" <heiko@sntech.de> To: Kever Yang <kever.yang@rock-chips.com> Cc: Mike Turquette <mturquette@linaro.org>, dianders@chromium.org, sonnyrao@chromium.org, addy.ke@rock-chips.com, cf@rock-chips.com, xjq@rock-chips.com, hj@rock-chips.com, huangtao@rock-chips.com, dkl@rock-chips.com, Russell King <linux@arm.linux.org.uk>, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Kumar Gala <galak@codeaurora.org>, Ian Campbell <ijc+devicetree@hellion.org.uk>, linux-rockchip@lists.infradead.org, Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>, Mark Rutland <mark.rutland@arm.com>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 0/2] init some clock rate from dts for rk3288 Date: Thu, 16 Oct 2014 22:22:16 +0200 [thread overview] Message-ID: <7367250.umrZo9GlUH@phil> (raw) In-Reply-To: <1412916630-8256-1-git-send-email-kever.yang@rock-chips.com> Am Donnerstag, 9. Oktober 2014, 21:50:28 schrieb Kever Yang: > This patch add init rate for PLLs and some bus clock from dts for rk3288, > add two clock rate of 400M and 500M into rate table for we will use it. > We need Doug's patch to make "aclk_cpu" get set properly: > <https://patchwork.kernel.org/patch/5038781/> > > Changes in v2: > - change the PLL setting of 400M to meet the constraints of TRM > - add review and test tag > - add some explanation in commit message > > Kever Yang (2): > clk: rockchip: add 400MHz and 500MHz for rk3288 clock rate > ARM: dts: enable init rate for clock I've added both patches to my wip branches for clock and dts. I've also adapted the subject of the 2nd one to "ARM: dts: rockchip: enable init rate for clock" because otherwise people reading the log won't be able to see which subarch this is. Heiko > > arch/arm/boot/dts/rk3288.dtsi | 10 ++++++++++ > drivers/clk/rockchip/clk-rk3288.c | 2 ++ > 2 files changed, 12 insertions(+)
WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stübner) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 0/2] init some clock rate from dts for rk3288 Date: Thu, 16 Oct 2014 22:22:16 +0200 [thread overview] Message-ID: <7367250.umrZo9GlUH@phil> (raw) In-Reply-To: <1412916630-8256-1-git-send-email-kever.yang@rock-chips.com> Am Donnerstag, 9. Oktober 2014, 21:50:28 schrieb Kever Yang: > This patch add init rate for PLLs and some bus clock from dts for rk3288, > add two clock rate of 400M and 500M into rate table for we will use it. > We need Doug's patch to make "aclk_cpu" get set properly: > <https://patchwork.kernel.org/patch/5038781/> > > Changes in v2: > - change the PLL setting of 400M to meet the constraints of TRM > - add review and test tag > - add some explanation in commit message > > Kever Yang (2): > clk: rockchip: add 400MHz and 500MHz for rk3288 clock rate > ARM: dts: enable init rate for clock I've added both patches to my wip branches for clock and dts. I've also adapted the subject of the 2nd one to "ARM: dts: rockchip: enable init rate for clock" because otherwise people reading the log won't be able to see which subarch this is. Heiko > > arch/arm/boot/dts/rk3288.dtsi | 10 ++++++++++ > drivers/clk/rockchip/clk-rk3288.c | 2 ++ > 2 files changed, 12 insertions(+)
next prev parent reply other threads:[~2014-10-16 20:22 UTC|newest] Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-10-10 4:50 [PATCH v2 0/2] init some clock rate from dts for rk3288 Kever Yang 2014-10-10 4:50 ` Kever Yang 2014-10-10 4:50 ` Kever Yang 2014-10-10 4:50 ` [PATCH v2 1/2] clk: rockchip: add 400MHz and 500MHz for rk3288 clock rate Kever Yang 2014-10-10 4:50 ` Kever Yang 2014-10-10 16:53 ` Doug Anderson 2014-10-10 16:53 ` Doug Anderson 2014-10-10 4:50 ` [PATCH v2 2/2] ARM: dts: enable init rate for clock Kever Yang 2014-10-10 4:50 ` Kever Yang 2014-10-16 20:22 ` Heiko Stübner [this message] 2014-10-16 20:22 ` [PATCH v2 0/2] init some clock rate from dts for rk3288 Heiko Stübner
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