From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> To: Simon Horman <horms+renesas@verge.net.au>, linux-renesas-soc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm <magnus.damm@gmail.com>, Fabrizio Castro <fabrizio.castro@bp.renesas.com> Subject: Re: [PATCH 08/12] arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices Date: Fri, 8 Feb 2019 15:52:34 +0300 [thread overview] Message-ID: <7d60ebf5-c245-f48d-47db-ce63f4f3690b@cogentembedded.com> (raw) In-Reply-To: <231d8908a66fa98f09553d31ad8cd5f382b29959.1549623801.git.horms+renesas@verge.net.au> Hello! On 02/08/2019 02:13 PM, Simon Horman wrote: > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > This patch defines OOP tables for all CPUs, similarly to > what done by Takeshi Kihara and Yoshihiro Kaneko for the > R8A77990. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [...] > @@ -55,6 +76,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Need space after =... > + operating-points-v2 = <&cluster1_opp>; > }; > > a53_1: cpu@1 { > @@ -64,6 +87,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Here as well... > + operating-points-v2 = <&cluster1_opp>; > }; > > L2_CA53: cache-controller-0 { MBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> To: Simon Horman <horms+renesas@verge.net.au>, linux-renesas-soc@vger.kernel.org Cc: Fabrizio Castro <fabrizio.castro@bp.renesas.com>, Magnus Damm <magnus.damm@gmail.com>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 08/12] arm64: dts: renesas: r8a774c0: Add OPPs table for cpu devices Date: Fri, 8 Feb 2019 15:52:34 +0300 [thread overview] Message-ID: <7d60ebf5-c245-f48d-47db-ce63f4f3690b@cogentembedded.com> (raw) In-Reply-To: <231d8908a66fa98f09553d31ad8cd5f382b29959.1549623801.git.horms+renesas@verge.net.au> Hello! On 02/08/2019 02:13 PM, Simon Horman wrote: > From: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > > This patch defines OOP tables for all CPUs, similarly to > what done by Takeshi Kihara and Yoshihiro Kaneko for the > R8A77990. > > Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> > Signed-off-by: Simon Horman <horms+renesas@verge.net.au> [...] > @@ -55,6 +76,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Need space after =... > + operating-points-v2 = <&cluster1_opp>; > }; > > a53_1: cpu@1 { > @@ -64,6 +87,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Here as well... > + operating-points-v2 = <&cluster1_opp>; > }; > > L2_CA53: cache-controller-0 { MBR, Sergei _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-02-08 12:53 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-02-08 11:13 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.1 Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 01/12] arm64: dts: renesas: Add Si-Linux CAT874 board support Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 02/12] arm64: dts: renesas: Add Si-Linux EK874 " Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 03/12] arm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2 Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 04/12] arm64: dts: renesas: r8a774c0-cat874: Add uSD support Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 05/12] arm64: dts: renesas: cat875: Add ethernet support Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 06/12] arm64: dts: renesas: enable HS400 on R-Car Gen3 Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 07/12] arm64: dts: renesas: r8a77990: Add OPPs table for cpu devices Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 08/12] arm64: dts: renesas: r8a774c0: " Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 12:52 ` Sergei Shtylyov [this message] 2019-02-08 12:52 ` Sergei Shtylyov 2019-02-08 15:26 ` Fabrizio Castro 2019-02-08 15:26 ` Fabrizio Castro 2019-02-11 9:49 ` Simon Horman 2019-02-11 9:49 ` Simon Horman 2019-02-14 12:57 ` Fabrizio Castro 2019-02-14 12:57 ` Fabrizio Castro 2019-02-08 11:13 ` [PATCH 09/12] arm64: dts: renesas: r8a774c0: Add CMT device nodes Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 10/12] arm64: dts: renesas: r8a774c0: Add TMU " Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 11/12] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-08 11:13 ` [PATCH 12/12] arm64: dts: renesas: cat875: Enable PCIe support Simon Horman 2019-02-08 11:13 ` Simon Horman 2019-02-15 14:44 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.1 Arnd Bergmann 2019-02-15 14:44 ` Arnd Bergmann
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