From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Magnus Damm <magnus.damm@gmail.com>,
Biju Das <biju.das@bp.renesas.com>,
Simon Horman <horms+renesas@verge.net.au>
Subject: [PATCH 11/12] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support
Date: Fri, 8 Feb 2019 12:13:20 +0100 [thread overview]
Message-ID: <aaf6c75c0458122600a20db9d41a0350f0a8dff8.1549623801.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1549623801.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges
mapping for pciec0 node. Also declare pcie bus clock, since it is
generated on the CAT874 main board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
index 477a56b3273c..96ee0d2c6357 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
@@ -56,6 +56,15 @@
clock-frequency = <48000000>;
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec0 {
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+};
+
&pfc {
scif2_pins: scif2 {
groups = "scif2_data_a";
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: Simon Horman <horms+renesas@verge.net.au>,
Magnus Damm <magnus.damm@gmail.com>,
linux-arm-kernel@lists.infradead.org,
Biju Das <biju.das@bp.renesas.com>
Subject: [PATCH 11/12] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support
Date: Fri, 8 Feb 2019 12:13:20 +0100 [thread overview]
Message-ID: <aaf6c75c0458122600a20db9d41a0350f0a8dff8.1549623801.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1549623801.git.horms+renesas@verge.net.au>
From: Biju Das <biju.das@bp.renesas.com>
Silicon Linux CAT 874 board has 2GB DDR memory. Update the dma-ranges
mapping for pciec0 node. Also declare pcie bus clock, since it is
generated on the CAT874 main board.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
index 477a56b3273c..96ee0d2c6357 100644
--- a/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
+++ b/arch/arm64/boot/dts/renesas/r8a774c0-cat874.dts
@@ -56,6 +56,15 @@
clock-frequency = <48000000>;
};
+&pcie_bus_clk {
+ clock-frequency = <100000000>;
+};
+
+&pciec0 {
+ /* Map all possible DDR as inbound ranges */
+ dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>;
+};
+
&pfc {
scif2_pins: scif2 {
groups = "scif2_data_a";
--
2.11.0
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next prev parent reply other threads:[~2019-02-08 11:13 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-08 11:13 [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.1 Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 01/12] arm64: dts: renesas: Add Si-Linux CAT874 board support Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 02/12] arm64: dts: renesas: Add Si-Linux EK874 " Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 03/12] arm64: dts: renesas: r8a774c0-cat874: Add pincontrol support to scif2 Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 04/12] arm64: dts: renesas: r8a774c0-cat874: Add uSD support Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 05/12] arm64: dts: renesas: cat875: Add ethernet support Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 06/12] arm64: dts: renesas: enable HS400 on R-Car Gen3 Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 07/12] arm64: dts: renesas: r8a77990: Add OPPs table for cpu devices Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 08/12] arm64: dts: renesas: r8a774c0: " Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 12:52 ` Sergei Shtylyov
2019-02-08 12:52 ` Sergei Shtylyov
2019-02-08 15:26 ` Fabrizio Castro
2019-02-08 15:26 ` Fabrizio Castro
2019-02-11 9:49 ` Simon Horman
2019-02-11 9:49 ` Simon Horman
2019-02-14 12:57 ` Fabrizio Castro
2019-02-14 12:57 ` Fabrizio Castro
2019-02-08 11:13 ` [PATCH 09/12] arm64: dts: renesas: r8a774c0: Add CMT device nodes Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` [PATCH 10/12] arm64: dts: renesas: r8a774c0: Add TMU " Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-08 11:13 ` Simon Horman [this message]
2019-02-08 11:13 ` [PATCH 11/12] arm64: dts: renesas: r8a774c0-cat874: Add pciec0 support Simon Horman
2019-02-08 11:13 ` [PATCH 12/12] arm64: dts: renesas: cat875: Enable PCIe support Simon Horman
2019-02-08 11:13 ` Simon Horman
2019-02-15 14:44 ` [GIT PULL] Second Round of Renesas ARM64 Based SoC DT Updates for v5.1 Arnd Bergmann
2019-02-15 14:44 ` Arnd Bergmann
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