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From: Kevin Hilman <khilman@baylibre.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Remi Pommarel <repk@triplefau.lt>
Cc: Kishon Vijay Abraham I <kishon@ti.com>,
	Yue Wang <yue.wang@Amlogic.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Jerome Brunet <jbrunet@baylibre.com>,
	linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH v6 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms
Date: Sat, 29 Feb 2020 17:07:43 +0100	[thread overview]
Message-ID: <7h8sklbcmo.fsf@baylibre.com> (raw)
In-Reply-To: <20200224141549.GB15614@e121166-lin.cambridge.arm.com>

Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> writes:

> On Fri, Jan 24, 2020 at 12:29:36AM +0100, Remi Pommarel wrote:
>> PCIe device probing failures have been seen on AXG platforms and were
>> due to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit
>> in MIPI's PHY registers solved the problem. This bit controls band gap
>> reference.
>> 
>> As discussed here [1] one of these shared MIPI/PCIE analog PHY register
>> bits was implemented in the clock driver as CLKID_MIPI_ENABLE. This adds
>> a PHY driver to control this bit instead, as well as setting the band
>> gap one in order to get reliable PCIE communication.
>> 
>> While at it add another PHY driver to control PCIE only PHY registers,
>> making AXG code more similar to G12A platform thus allowing to remove
>> some specific platform handling in pci-meson driver.
>> 
>> Please note that CLKID_MIPI_ENABLE removable will be done in a different
>> serie.
>> 
>> Changes since v5:
>>  - Add additionalProperties in device tree binding documentation
>>  - Make analog PHY required
>> 
>> Changes since v4:
>>  - Rename the shared MIPI/PCIe PHY to analog
>>  - Chain the MIPI/PCIe PHY to the PCIe one
>> 
>> Changes since v3:
>>  - Go back to the shared MIPI/PCIe phy driver solution from v2
>>  - Remove syscon usage
>>  - Add all dt-bindings documentation
>> 
>> Changes since v2:
>>  - Remove shared MIPI/PCIE device driver and use syscon to access register
>>    in PCIE only driver instead
>>  - Include devicetree documentation
>> 
>> Changes sinve v1:
>>  - Move HHI_MIPI_CNTL0 bit control in its own PHY driver
>>  - Add a PHY driver for PCIE_PHY registers
>>  - Modify pci-meson.c to make use of both PHYs and remove specific
>>    handling for AXG and G12A
>> 
>> [1] https://lkml.org/lkml/2019/12/16/119
>> 
>> Remi Pommarel (7):
>>   dt-bindings: Add AXG PCIE PHY bindings
>>   dt-bindings: Add AXG shared MIPI/PCIE analog PHY bindings
>>   dt-bindings: PCI: meson: Update PCIE bindings documentation
>>   arm64: dts: meson-axg: Add PCIE PHY nodes
>>   phy: amlogic: Add Amlogic AXG MIPI/PCIE analog PHY Driver
>>   phy: amlogic: Add Amlogic AXG PCIE PHY Driver
>>   PCI: amlogic: Use AXG PCIE
>> 
>>  .../bindings/pci/amlogic,meson-pcie.txt       |  22 +-
>>  .../amlogic,meson-axg-mipi-pcie-analog.yaml   |  35 ++++
>>  .../bindings/phy/amlogic,meson-axg-pcie.yaml  |  52 +++++
>>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |  16 ++
>>  drivers/pci/controller/dwc/pci-meson.c        | 116 ++---------
>>  drivers/phy/amlogic/Kconfig                   |  22 ++
>>  drivers/phy/amlogic/Makefile                  |  12 +-
>>  .../amlogic/phy-meson-axg-mipi-pcie-analog.c  | 188 +++++++++++++++++
>>  drivers/phy/amlogic/phy-meson-axg-pcie.c      | 192 ++++++++++++++++++
>>  9 files changed, 543 insertions(+), 112 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
>>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
>>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
>>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c
>
> Hi Remi,
>
> I am ready to pull this series in, do you want me to ? Or you prefer
> it to go via a different tree upstream ?

To avoid conflicts, I'll take the DT patch (PATCH 4/7) through my
amlogic tree, but feel free to take the rest.

Kevin


WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@baylibre.com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Remi Pommarel <repk@triplefau.lt>
Cc: devicetree@vger.kernel.org,
	Neil Armstrong <narmstrong@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	Yue Wang <yue.wang@Amlogic.com>, Rob Herring <robh+dt@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-amlogic@lists.infradead.org,
	Kishon Vijay Abraham I <kishon@ti.com>,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v6 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms
Date: Sat, 29 Feb 2020 17:07:43 +0100	[thread overview]
Message-ID: <7h8sklbcmo.fsf@baylibre.com> (raw)
In-Reply-To: <20200224141549.GB15614@e121166-lin.cambridge.arm.com>

Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> writes:

> On Fri, Jan 24, 2020 at 12:29:36AM +0100, Remi Pommarel wrote:
>> PCIe device probing failures have been seen on AXG platforms and were
>> due to unreliable clock signal output. Setting HHI_MIPI_CNTL0[26] bit
>> in MIPI's PHY registers solved the problem. This bit controls band gap
>> reference.
>> 
>> As discussed here [1] one of these shared MIPI/PCIE analog PHY register
>> bits was implemented in the clock driver as CLKID_MIPI_ENABLE. This adds
>> a PHY driver to control this bit instead, as well as setting the band
>> gap one in order to get reliable PCIE communication.
>> 
>> While at it add another PHY driver to control PCIE only PHY registers,
>> making AXG code more similar to G12A platform thus allowing to remove
>> some specific platform handling in pci-meson driver.
>> 
>> Please note that CLKID_MIPI_ENABLE removable will be done in a different
>> serie.
>> 
>> Changes since v5:
>>  - Add additionalProperties in device tree binding documentation
>>  - Make analog PHY required
>> 
>> Changes since v4:
>>  - Rename the shared MIPI/PCIe PHY to analog
>>  - Chain the MIPI/PCIe PHY to the PCIe one
>> 
>> Changes since v3:
>>  - Go back to the shared MIPI/PCIe phy driver solution from v2
>>  - Remove syscon usage
>>  - Add all dt-bindings documentation
>> 
>> Changes since v2:
>>  - Remove shared MIPI/PCIE device driver and use syscon to access register
>>    in PCIE only driver instead
>>  - Include devicetree documentation
>> 
>> Changes sinve v1:
>>  - Move HHI_MIPI_CNTL0 bit control in its own PHY driver
>>  - Add a PHY driver for PCIE_PHY registers
>>  - Modify pci-meson.c to make use of both PHYs and remove specific
>>    handling for AXG and G12A
>> 
>> [1] https://lkml.org/lkml/2019/12/16/119
>> 
>> Remi Pommarel (7):
>>   dt-bindings: Add AXG PCIE PHY bindings
>>   dt-bindings: Add AXG shared MIPI/PCIE analog PHY bindings
>>   dt-bindings: PCI: meson: Update PCIE bindings documentation
>>   arm64: dts: meson-axg: Add PCIE PHY nodes
>>   phy: amlogic: Add Amlogic AXG MIPI/PCIE analog PHY Driver
>>   phy: amlogic: Add Amlogic AXG PCIE PHY Driver
>>   PCI: amlogic: Use AXG PCIE
>> 
>>  .../bindings/pci/amlogic,meson-pcie.txt       |  22 +-
>>  .../amlogic,meson-axg-mipi-pcie-analog.yaml   |  35 ++++
>>  .../bindings/phy/amlogic,meson-axg-pcie.yaml  |  52 +++++
>>  arch/arm64/boot/dts/amlogic/meson-axg.dtsi    |  16 ++
>>  drivers/pci/controller/dwc/pci-meson.c        | 116 ++---------
>>  drivers/phy/amlogic/Kconfig                   |  22 ++
>>  drivers/phy/amlogic/Makefile                  |  12 +-
>>  .../amlogic/phy-meson-axg-mipi-pcie-analog.c  | 188 +++++++++++++++++
>>  drivers/phy/amlogic/phy-meson-axg-pcie.c      | 192 ++++++++++++++++++
>>  9 files changed, 543 insertions(+), 112 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-mipi-pcie-analog.yaml
>>  create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-axg-pcie.yaml
>>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-mipi-pcie-analog.c
>>  create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c
>
> Hi Remi,
>
> I am ready to pull this series in, do you want me to ? Or you prefer
> it to go via a different tree upstream ?

To avoid conflicts, I'll take the DT patch (PATCH 4/7) through my
amlogic tree, but feel free to take the rest.

Kevin


_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic

  reply	other threads:[~2020-02-29 16:07 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-23 23:29 [PATCH v6 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms Remi Pommarel
2020-01-23 23:29 ` Remi Pommarel
2020-01-23 23:29 ` [PATCH v6 1/7] dt-bindings: Add AXG PCIE PHY bindings Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:27   ` Remi Pommarel
2020-01-24  8:27     ` Remi Pommarel
2020-01-23 23:29 ` [PATCH v6 2/7] dt-bindings: Add AXG shared MIPI/PCIE analog " Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:28   ` Remi Pommarel
2020-01-24  8:28     ` Remi Pommarel
2020-01-23 23:29 ` [PATCH v6 3/7] dt-bindings: PCI: meson: Update PCIE bindings documentation Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:30   ` Remi Pommarel
2020-01-24  8:30     ` Remi Pommarel
2020-01-23 23:29 ` [PATCH v6 4/7] arm64: dts: meson-axg: Add PCIE PHY nodes Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:34   ` Remi Pommarel
2020-01-24  8:34     ` Remi Pommarel
2020-01-23 23:29 ` [PATCH v6 5/7] phy: amlogic: Add Amlogic AXG MIPI/PCIE analog PHY Driver Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:32   ` Remi Pommarel
2020-01-24  8:32     ` Remi Pommarel
2020-03-03 17:19   ` Lorenzo Pieralisi
2020-03-03 17:19     ` Lorenzo Pieralisi
2020-03-04  9:08     ` Neil Armstrong
2020-03-04  9:08       ` Neil Armstrong
2020-03-04 10:44       ` Lorenzo Pieralisi
2020-03-04 10:44         ` Lorenzo Pieralisi
2020-01-23 23:29 ` [PATCH v6 6/7] phy: amlogic: Add Amlogic AXG PCIE " Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-03-04 10:47   ` Neil Armstrong
2020-03-04 10:47     ` Neil Armstrong
2020-03-04 11:01   ` Kishon Vijay Abraham I
2020-03-04 11:01     ` Kishon Vijay Abraham I
2020-03-04 13:08     ` Remi Pommarel
2020-03-04 13:08       ` Remi Pommarel
2020-03-05  4:56       ` Kishon Vijay Abraham I
2020-03-05  4:56         ` Kishon Vijay Abraham I
2020-03-05  7:00         ` Neil Armstrong
2020-03-05  7:00           ` Neil Armstrong
2020-01-23 23:29 ` [PATCH v6 7/7] PCI: amlogic: Use AXG PCIE Remi Pommarel
2020-01-23 23:29   ` Remi Pommarel
2020-01-24  8:35   ` Remi Pommarel
2020-01-24  8:35     ` Remi Pommarel
2020-01-24  8:02 ` [PATCH v6 0/7] PCI: amlogic: Make PCIe working reliably on AXG platforms Neil Armstrong
2020-01-24  8:02   ` Neil Armstrong
2020-01-24  8:37   ` Remi Pommarel
2020-01-24  8:37     ` Remi Pommarel
2020-02-24 14:15 ` Lorenzo Pieralisi
2020-02-24 14:15   ` Lorenzo Pieralisi
2020-02-29 16:07   ` Kevin Hilman [this message]
2020-02-29 16:07     ` Kevin Hilman
2020-02-29 17:10     ` Remi Pommarel
2020-02-29 17:10       ` Remi Pommarel
2020-03-03 15:03     ` Lorenzo Pieralisi
2020-03-03 15:03       ` Lorenzo Pieralisi
2020-03-04 12:28     ` Lorenzo Pieralisi
2020-03-04 12:28       ` Lorenzo Pieralisi

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