From: Jani Nikula <jani.nikula@intel.com>
To: Vandita Kulkarni <vandita.kulkarni@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: imre.deak@intel.com, matthew.d.roper@intel.com,
Vandita Kulkarni <vandita.kulkarni@intel.com>
Subject: Re: [Intel-gfx] [PATCH 3/4] drm/i915/dsi/xelpd: Disable DC states in Video mode
Date: Tue, 19 Oct 2021 13:24:51 +0300 [thread overview]
Message-ID: <87v91tqpl8.fsf@intel.com> (raw)
In-Reply-To: <20211018065207.30587-4-vandita.kulkarni@intel.com>
On Mon, 18 Oct 2021, Vandita Kulkarni <vandita.kulkarni@intel.com> wrote:
> MIPI DSI transcoder cannot be in video mode to support any of the
> display C states.
Imre, could you review this one please?
The added confusion is that POWER_DOMAIN_TRANSCODER_DSI_A and
POWER_DOMAIN_TRANSCODER_DSI_C are never used anywhere and
POWER_DOMAIN_TRANSCODER() does not take DSI transcoders into account.
> Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 709569211c85..8406db5e573e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -3105,7 +3105,8 @@ intel_display_power_put_mask_in_set(struct drm_i915_private *i915,
> BIT_ULL(POWER_DOMAIN_MODESET) | \
> BIT_ULL(POWER_DOMAIN_AUX_A) | \
> BIT_ULL(POWER_DOMAIN_AUX_B) | \
> - BIT_ULL(POWER_DOMAIN_INIT))
> + BIT_ULL(POWER_DOMAIN_INIT)) | \
> + BIT_ULL(POWER_DOMAIN_PORT_DSI)
Everywhere else POWER_DOMAIN_INIT is last in the list.
BR,
Jani.
>
> #define XELPD_AUX_IO_D_XELPD_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_D_XELPD)
> #define XELPD_AUX_IO_E_XELPD_POWER_DOMAINS BIT_ULL(POWER_DOMAIN_AUX_E_XELPD)
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2021-10-19 10:24 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-18 6:52 [Intel-gfx] [PATCH 0/4] Enable MIPI DSI video mode on ADLP Vandita Kulkarni
2021-10-18 6:52 ` [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB Vandita Kulkarni
2021-10-19 10:05 ` Jani Nikula
2021-10-19 10:15 ` Ville Syrjälä
2021-10-19 10:28 ` Jani Nikula
2021-10-19 10:41 ` Ville Syrjälä
2021-10-19 10:50 ` Ville Syrjälä
2021-10-19 11:27 ` Kulkarni, Vandita
2021-10-18 6:52 ` [Intel-gfx] [PATCH 2/4] drm/i915/dsi/xelpd: Add DSI transcoder support Vandita Kulkarni
2021-10-19 10:13 ` Jani Nikula
2021-10-19 11:40 ` Kulkarni, Vandita
2021-10-19 11:45 ` Jani Nikula
2021-10-18 6:52 ` [Intel-gfx] [PATCH 3/4] drm/i915/dsi/xelpd: Disable DC states in Video mode Vandita Kulkarni
2021-10-19 10:24 ` Jani Nikula [this message]
2021-10-19 12:08 ` Imre Deak
2021-10-18 6:52 ` [Intel-gfx] [PATCH 4/4] drm/i915/dsi: Ungate clock before enabling the phy Vandita Kulkarni
2021-10-19 10:18 ` Jani Nikula
2021-10-19 11:32 ` Kulkarni, Vandita
2021-10-19 11:43 ` Kulkarni, Vandita
2021-10-19 11:46 ` Jani Nikula
2021-10-19 11:48 ` Kulkarni, Vandita
2021-10-18 7:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable MIPI DSI video mode on ADLP Patchwork
2021-10-18 7:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-18 9:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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