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From: "Kulkarni, Vandita" <vandita.kulkarni@intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
	"Nikula, Jani" <jani.nikula@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"Deak, Imre" <imre.deak@intel.com>,
	"Roper, Matthew D" <matthew.d.roper@intel.com>
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB
Date: Tue, 19 Oct 2021 11:27:36 +0000	[thread overview]
Message-ID: <9bc8ee232ac14332822a7f89cfa47f17@intel.com> (raw)
In-Reply-To: <YW6jC9MjyUQic0qa@intel.com>

> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, October 19, 2021 4:21 PM
> To: Nikula, Jani <jani.nikula@intel.com>
> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>; intel-
> gfx@lists.freedesktop.org; Deak, Imre <imre.deak@intel.com>; Roper,
> Matthew D <matthew.d.roper@intel.com>
> Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for
> wakeup GB
> 
> On Tue, Oct 19, 2021 at 01:41:50PM +0300, Ville Syrjälä wrote:
> > On Tue, Oct 19, 2021 at 01:28:10PM +0300, Jani Nikula wrote:
> > > On Tue, 19 Oct 2021, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > > > On Tue, Oct 19, 2021 at 01:05:20PM +0300, Jani Nikula wrote:
> > > >> On Mon, 18 Oct 2021, Vandita Kulkarni <vandita.kulkarni@intel.com>
> wrote:
> > > >>
> > > >> Commit message goes here.
> > > >>
> > > >> > Fixes: f87c46c43175 ("drm/i915/dsi/xelpd: Add WA to program LP
> > > >> > to HS wakeup guardband")
> > > >> > Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
> > > >> > ---
> > > >> >  drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> > > >> >  drivers/gpu/drm/i915/i915_reg.h        | 3 ++-
> > > >> >  2 files changed, 3 insertions(+), 2 deletions(-)
> > > >> >
> > > >> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> > > >> > b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > >> > index 9ee62707ec72..8c166f92f8bd 100644
> > > >> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > > >> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > >> > @@ -1271,7 +1271,7 @@ static void
> adlp_set_lp_hs_wakeup_gb(struct intel_encoder *encoder)
> > > >> >  	if (DISPLAY_VER(i915) == 13) {
> > > >> >  		for_each_dsi_port(port, intel_dsi->ports)
> > > >> >  			intel_de_rmw(i915,
> TGL_DSI_CHKN_REG(port),
> > > >> > -				     TGL_DSI_CHKN_LSHS_GB, 0x4);
> > > >> > +				     TGL_DSI_CHKN_LSHS_GB_MASK,
> > > >> > +TGL_DSI_CHKN_LSHS_GB_MASK);
> > > >>
> > > >> I think you mean the value should be TGL_DSI_CHKN_LSHS_GB.
Yes, my bad.
> > > >
> > > > IMO the value should never be named that. It should be
> > > > TGL_DSI_CHKN_LSHS_GB_<something>.
> > >
> > > Alternatively,
> > >
> > > #define TGL_DSI_CHKN_LSHS_GB(byte_clocks)
> 	REG_FIELD_PREP(TGL_DSI_CHKN_LSHS_GB_MASK, (byte_clocks))
> > >
> > > and
> > >
> > > intel_de_rmw(i915, TGL_DSI_CHKN_REG(port),
> > > 	     TGL_DSI_CHKN_LSHS_GB_MASK, TGL_DSI_CHKN_LSHS_GB(4));
> > >
> > > ?
> > >
> > > We're using the value in a specific place that references a w/a, so
> > > the magic 4 isn't too bad.

This seems more appropriate will make this change.
Thanks.
> >
> > Yeah, for parametrized defines I think the "_<something>" is not
> > needed. Probably not even desired. The argument passed in is the
> > "_<something>" essentially.
> 
> Oh and, yes, I think having the magic number in the code is fine for cases like
> this. I'd say I probably even prefer it that way.
> As long as the whole register value isn't a single magic hex constant that I
> have to decode by hand to see what bitfields are getting what values.

Thanks, will use the hardcoding in icl_dsi.
> 
> --
> Ville Syrjälä
> Intel

  reply	other threads:[~2021-10-19 11:27 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-18  6:52 [Intel-gfx] [PATCH 0/4] Enable MIPI DSI video mode on ADLP Vandita Kulkarni
2021-10-18  6:52 ` [Intel-gfx] [PATCH 1/4] drm/i915/dsi/xelpd: Fix the bit mask for wakeup GB Vandita Kulkarni
2021-10-19 10:05   ` Jani Nikula
2021-10-19 10:15     ` Ville Syrjälä
2021-10-19 10:28       ` Jani Nikula
2021-10-19 10:41         ` Ville Syrjälä
2021-10-19 10:50           ` Ville Syrjälä
2021-10-19 11:27             ` Kulkarni, Vandita [this message]
2021-10-18  6:52 ` [Intel-gfx] [PATCH 2/4] drm/i915/dsi/xelpd: Add DSI transcoder support Vandita Kulkarni
2021-10-19 10:13   ` Jani Nikula
2021-10-19 11:40     ` Kulkarni, Vandita
2021-10-19 11:45       ` Jani Nikula
2021-10-18  6:52 ` [Intel-gfx] [PATCH 3/4] drm/i915/dsi/xelpd: Disable DC states in Video mode Vandita Kulkarni
2021-10-19 10:24   ` Jani Nikula
2021-10-19 12:08     ` Imre Deak
2021-10-18  6:52 ` [Intel-gfx] [PATCH 4/4] drm/i915/dsi: Ungate clock before enabling the phy Vandita Kulkarni
2021-10-19 10:18   ` Jani Nikula
2021-10-19 11:32     ` Kulkarni, Vandita
2021-10-19 11:43       ` Kulkarni, Vandita
2021-10-19 11:46       ` Jani Nikula
2021-10-19 11:48         ` Kulkarni, Vandita
2021-10-18  7:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable MIPI DSI video mode on ADLP Patchwork
2021-10-18  7:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-10-18  9:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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