From: Anup Patel <anup@brainfault.org> To: Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@atishpatra.org> Cc: Paolo Bonzini <pbonzini@redhat.com>, Anup Patel <apatel@ventanamicro.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/9] RISC-V KVM ONE_REG interface for SBI Date: Sat, 3 Dec 2022 18:09:11 +0530 [thread overview] Message-ID: <CAAhSdy1b=uzQqaBAkysHzFtSC+ftrTEryqLT03SPrBtyTKjuWQ@mail.gmail.com> (raw) In-Reply-To: <20221128161424.608889-1-apatel@ventanamicro.com> On Mon, Nov 28, 2022 at 9:44 PM Anup Patel <apatel@ventanamicro.com> wrote: > > This series does first does few cleanups/fixes (PATCH1 to PATCH5) and > adds ONE-REG interface for customizing the SBI interface visible to the > Guest/VM. > > The testing of this series has been done with KVMTOOL changes in > riscv_sbi_imp_v1 branch at: > https://github.com/avpatel/kvmtool.git > > These patches can also be found in the riscv_kvm_sbi_imp_v1 branch at: > https://github.com/avpatel/linux.git > > Anup Patel (9): > RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config() > RISC-V: KVM: Remove redundant includes of asm/kvm_vcpu_timer.h > RISC-V: KVM: Remove redundant includes of asm/csr.h > RISC-V: KVM: Use switch-case in kvm_riscv_vcpu_set/get_reg() > RISC-V: KVM: Move sbi related struct and functions to kvm_vcpu_sbi.h > RISC-V: Export sbi_get_mvendorid() and friends > RISC-V: KVM: Save mvendorid, marchid, and mimpid when creating VCPU > RISC-V: KVM: Add ONE_REG interface for mvendorid, marchid, and mimpid > RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions I have queued PATCH1 to PATCH8 for Linux-6.2. I have deferred PATCH9 until we have an agreement about how to deal with VM-level attributes. This is also required for the KVM SBI PMU series. > > arch/riscv/include/asm/kvm_host.h | 16 ++- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 14 ++- > arch/riscv/include/uapi/asm/kvm.h | 22 ++++ > arch/riscv/kernel/sbi.c | 3 + > arch/riscv/kvm/vcpu.c | 82 +++++++++++---- > arch/riscv/kvm/vcpu_sbi.c | 145 +++++++++++++++++++++++--- > arch/riscv/kvm/vcpu_sbi_base.c | 15 ++- > arch/riscv/kvm/vcpu_sbi_hsm.c | 1 - > arch/riscv/kvm/vcpu_sbi_replace.c | 1 - > arch/riscv/kvm/vcpu_sbi_v01.c | 1 - > 10 files changed, 244 insertions(+), 56 deletions(-) > > -- > 2.34.1 > Thanks, Anup
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org> To: Andrew Jones <ajones@ventanamicro.com>, Atish Patra <atishp@atishpatra.org> Cc: Paolo Bonzini <pbonzini@redhat.com>, Anup Patel <apatel@ventanamicro.com>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/9] RISC-V KVM ONE_REG interface for SBI Date: Sat, 3 Dec 2022 18:09:11 +0530 [thread overview] Message-ID: <CAAhSdy1b=uzQqaBAkysHzFtSC+ftrTEryqLT03SPrBtyTKjuWQ@mail.gmail.com> (raw) In-Reply-To: <20221128161424.608889-1-apatel@ventanamicro.com> On Mon, Nov 28, 2022 at 9:44 PM Anup Patel <apatel@ventanamicro.com> wrote: > > This series does first does few cleanups/fixes (PATCH1 to PATCH5) and > adds ONE-REG interface for customizing the SBI interface visible to the > Guest/VM. > > The testing of this series has been done with KVMTOOL changes in > riscv_sbi_imp_v1 branch at: > https://github.com/avpatel/kvmtool.git > > These patches can also be found in the riscv_kvm_sbi_imp_v1 branch at: > https://github.com/avpatel/linux.git > > Anup Patel (9): > RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config() > RISC-V: KVM: Remove redundant includes of asm/kvm_vcpu_timer.h > RISC-V: KVM: Remove redundant includes of asm/csr.h > RISC-V: KVM: Use switch-case in kvm_riscv_vcpu_set/get_reg() > RISC-V: KVM: Move sbi related struct and functions to kvm_vcpu_sbi.h > RISC-V: Export sbi_get_mvendorid() and friends > RISC-V: KVM: Save mvendorid, marchid, and mimpid when creating VCPU > RISC-V: KVM: Add ONE_REG interface for mvendorid, marchid, and mimpid > RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions I have queued PATCH1 to PATCH8 for Linux-6.2. I have deferred PATCH9 until we have an agreement about how to deal with VM-level attributes. This is also required for the KVM SBI PMU series. > > arch/riscv/include/asm/kvm_host.h | 16 ++- > arch/riscv/include/asm/kvm_vcpu_sbi.h | 14 ++- > arch/riscv/include/uapi/asm/kvm.h | 22 ++++ > arch/riscv/kernel/sbi.c | 3 + > arch/riscv/kvm/vcpu.c | 82 +++++++++++---- > arch/riscv/kvm/vcpu_sbi.c | 145 +++++++++++++++++++++++--- > arch/riscv/kvm/vcpu_sbi_base.c | 15 ++- > arch/riscv/kvm/vcpu_sbi_hsm.c | 1 - > arch/riscv/kvm/vcpu_sbi_replace.c | 1 - > arch/riscv/kvm/vcpu_sbi_v01.c | 1 - > 10 files changed, 244 insertions(+), 56 deletions(-) > > -- > 2.34.1 > Thanks, Anup _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-12-03 12:39 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-11-28 16:14 [PATCH 0/9] RISC-V KVM ONE_REG interface for SBI Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 16:14 ` [PATCH 1/9] RISC-V: KVM: Fix reg_val check in kvm_riscv_vcpu_set_reg_config() Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:03 ` Atish Patra 2022-11-28 21:03 ` Atish Patra 2022-11-28 16:14 ` [PATCH 2/9] RISC-V: KVM: Remove redundant includes of asm/kvm_vcpu_timer.h Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:04 ` Atish Patra 2022-11-28 21:04 ` Atish Patra 2022-11-29 5:20 ` Andrew Jones 2022-11-29 5:20 ` Andrew Jones 2022-11-28 16:14 ` [PATCH 3/9] RISC-V: KVM: Remove redundant includes of asm/csr.h Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:04 ` Atish Patra 2022-11-28 21:04 ` Atish Patra 2022-11-28 16:14 ` [PATCH 4/9] RISC-V: KVM: Use switch-case in kvm_riscv_vcpu_set/get_reg() Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:04 ` Atish Patra 2022-11-28 21:04 ` Atish Patra 2022-11-28 16:14 ` [PATCH 5/9] RISC-V: KVM: Move sbi related struct and functions to kvm_vcpu_sbi.h Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:06 ` Atish Patra 2022-11-28 21:06 ` Atish Patra 2022-11-29 5:21 ` Andrew Jones 2022-11-29 5:21 ` Andrew Jones 2022-11-28 16:14 ` [PATCH 6/9] RISC-V: Export sbi_get_mvendorid() and friends Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:07 ` Atish Patra 2022-11-28 21:07 ` Atish Patra 2022-12-09 4:33 ` Palmer Dabbelt 2022-12-09 4:33 ` Palmer Dabbelt 2022-11-29 5:21 ` Andrew Jones 2022-11-29 5:21 ` Andrew Jones 2022-12-02 17:53 ` Palmer Dabbelt 2022-12-02 17:53 ` Palmer Dabbelt 2022-11-28 16:14 ` [PATCH 7/9] RISC-V: KVM: Save mvendorid, marchid, and mimpid when creating VCPU Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:08 ` Atish Patra 2022-11-28 21:08 ` Atish Patra 2022-11-29 5:22 ` Andrew Jones 2022-11-29 5:22 ` Andrew Jones 2022-11-28 16:14 ` [PATCH 8/9] RISC-V: KVM: Add ONE_REG interface for mvendorid, marchid, and mimpid Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-28 21:09 ` Atish Patra 2022-11-28 21:09 ` Atish Patra 2022-11-29 5:46 ` Andrew Jones 2022-11-29 5:46 ` Andrew Jones 2022-12-03 12:18 ` Anup Patel 2022-12-03 12:18 ` Anup Patel 2022-11-28 16:14 ` [PATCH 9/9] RISC-V: KVM: Add ONE_REG interface to enable/disable SBI extensions Anup Patel 2022-11-28 16:14 ` Anup Patel 2022-11-29 6:09 ` Andrew Jones 2022-11-29 6:09 ` Andrew Jones 2022-12-03 12:39 ` Anup Patel [this message] 2022-12-03 12:39 ` [PATCH 0/9] RISC-V KVM ONE_REG interface for SBI Anup Patel
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