From: Ryan Case <ryandcase@chromium.org> To: yongqiang.niu@mediatek.com Cc: CK Hu <ck.hu@mediatek.com>, Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Matthias Brugger <matthias.bgg@gmail.com>, David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>, Mark Rutland <mark.rutland@arm.com>, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org Subject: Re: [PATCH v4, 23/33] drm/mediatek: add ovl0/ovl_2l0 usecase Date: Tue, 16 Jul 2019 16:13:26 -0700 [thread overview] Message-ID: <CACjz--=Wn4BH_EwEm0DD-vUxB796wUy5Z3MLiOSeiOZXa92r_w@mail.gmail.com> (raw) In-Reply-To: <1562625253-29254-24-git-send-email-yongqiang.niu@mediatek.com> On Mon, Jul 8, 2019 at 3:35 PM <yongqiang.niu@mediatek.com> wrote: > > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > This patch add ovl0/ovl_2l0 usecase > in ovl->ovl_2l0 direct link usecase: > 1. the crtc support layer number will 4+2 > 2. ovl_2l0 background color input select ovl0 when crtc init > and disable it when crtc finish > 3. config ovl_2l0 layer, if crtc config layer number is > bigger than ovl0 support layers(max is 4) > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++-- > 1 file changed, 36 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index 5eac376..9ee9ce2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -282,6 +282,15 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > > for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; > + enum mtk_ddp_comp_id prev; > + > + if (i > 0) > + prev = mtk_crtc->ddp_comp[i - 1]->id; > + else > + prev = DDP_COMPONENT_ID_MAX; > + > + if (prev == DDP_COMPONENT_OVL0) > + mtk_ddp_comp_bgclr_in_on(comp); > > mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); > mtk_ddp_comp_start(comp); > @@ -291,9 +300,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > for (i = 0; i < mtk_crtc->layer_nr; i++) { > struct drm_plane *plane = &mtk_crtc->planes[i]; > struct mtk_plane_state *plane_state; > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > plane_state = to_mtk_plane_state(plane->state); > - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i, > + > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + mtk_ddp_comp_layer_config(comp , local_layer, > plane_state); There is an extra space after comp. This whole loop is essentially identical to the one found in mtk_crtc_ddp_config below. It would be nice to either move that loop to a dedicated function called from both spots or allow mtk_crtc_ddp_config to be called from here. > } > > @@ -319,6 +337,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) > mtk_crtc->ddp_comp[i]->id); > mtk_disp_mutex_disable(mtk_crtc->mutex); > for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { > + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); > mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, > mtk_crtc->mmsys_reg_data, > mtk_crtc->ddp_comp[i]->id, > @@ -339,6 +358,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > unsigned int i; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > /* > * TODO: instead of updating the registers here, we should prepare > @@ -361,7 +382,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > plane_state = to_mtk_plane_state(plane->state); > > if (plane_state->pending.config) { > - mtk_ddp_comp_layer_config(comp, i, plane_state); > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + > + mtk_ddp_comp_layer_config(comp, local_layer, > + plane_state); > plane_state->pending.config = false; > } > } > @@ -592,6 +620,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > } > > mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]); > + if (mtk_crtc->ddp_comp_nr > 1) { > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1]; > + > + if (comp->funcs->bgclr_in_on) > + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp); > + } > mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr, > sizeof(struct drm_plane), > GFP_KERNEL); > -- > 1.8.1.1.dirty >
WARNING: multiple messages have this Message-ID (diff)
From: Ryan Case <ryandcase@chromium.org> To: yongqiang.niu@mediatek.com Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, Philipp Zabel <p.zabel@pengutronix.de>, David Airlie <airlied@linux.ie>, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Matthias Brugger <matthias.bgg@gmail.com>, Rob Herring <robh+dt@kernel.org>, linux-mediatek@lists.infradead.org, Daniel Vetter <daniel@ffwll.ch>, CK Hu <ck.hu@mediatek.com>, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v4, 23/33] drm/mediatek: add ovl0/ovl_2l0 usecase Date: Tue, 16 Jul 2019 16:13:26 -0700 [thread overview] Message-ID: <CACjz--=Wn4BH_EwEm0DD-vUxB796wUy5Z3MLiOSeiOZXa92r_w@mail.gmail.com> (raw) In-Reply-To: <1562625253-29254-24-git-send-email-yongqiang.niu@mediatek.com> On Mon, Jul 8, 2019 at 3:35 PM <yongqiang.niu@mediatek.com> wrote: > > From: Yongqiang Niu <yongqiang.niu@mediatek.com> > > This patch add ovl0/ovl_2l0 usecase > in ovl->ovl_2l0 direct link usecase: > 1. the crtc support layer number will 4+2 > 2. ovl_2l0 background color input select ovl0 when crtc init > and disable it when crtc finish > 3. config ovl_2l0 layer, if crtc config layer number is > bigger than ovl0 support layers(max is 4) > > Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 38 +++++++++++++++++++++++++++++++-- > 1 file changed, 36 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > index 5eac376..9ee9ce2 100644 > --- a/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > +++ b/drivers/gpu/drm/mediatek/mtk_drm_crtc.c > @@ -282,6 +282,15 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > > for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) { > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[i]; > + enum mtk_ddp_comp_id prev; > + > + if (i > 0) > + prev = mtk_crtc->ddp_comp[i - 1]->id; > + else > + prev = DDP_COMPONENT_ID_MAX; > + > + if (prev == DDP_COMPONENT_OVL0) > + mtk_ddp_comp_bgclr_in_on(comp); > > mtk_ddp_comp_config(comp, width, height, vrefresh, bpc); > mtk_ddp_comp_start(comp); > @@ -291,9 +300,18 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc) > for (i = 0; i < mtk_crtc->layer_nr; i++) { > struct drm_plane *plane = &mtk_crtc->planes[i]; > struct mtk_plane_state *plane_state; > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > plane_state = to_mtk_plane_state(plane->state); > - mtk_ddp_comp_layer_config(mtk_crtc->ddp_comp[0], i, > + > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + mtk_ddp_comp_layer_config(comp , local_layer, > plane_state); There is an extra space after comp. This whole loop is essentially identical to the one found in mtk_crtc_ddp_config below. It would be nice to either move that loop to a dedicated function called from both spots or allow mtk_crtc_ddp_config to be called from here. > } > > @@ -319,6 +337,7 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc) > mtk_crtc->ddp_comp[i]->id); > mtk_disp_mutex_disable(mtk_crtc->mutex); > for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) { > + mtk_ddp_comp_bgclr_in_off(mtk_crtc->ddp_comp[i]); > mtk_ddp_remove_comp_from_path(mtk_crtc->config_regs, > mtk_crtc->mmsys_reg_data, > mtk_crtc->ddp_comp[i]->id, > @@ -339,6 +358,8 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > struct mtk_crtc_state *state = to_mtk_crtc_state(mtk_crtc->base.state); > struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[0]; > unsigned int i; > + unsigned int comp_layer_nr = mtk_ddp_comp_layer_nr(comp); > + unsigned int local_layer; > > /* > * TODO: instead of updating the registers here, we should prepare > @@ -361,7 +382,14 @@ static void mtk_crtc_ddp_config(struct drm_crtc *crtc) > plane_state = to_mtk_plane_state(plane->state); > > if (plane_state->pending.config) { > - mtk_ddp_comp_layer_config(comp, i, plane_state); > + if (i >= comp_layer_nr) { > + comp = mtk_crtc->ddp_comp[1]; > + local_layer = i - comp_layer_nr; > + } else > + local_layer = i; > + > + mtk_ddp_comp_layer_config(comp, local_layer, > + plane_state); > plane_state->pending.config = false; > } > } > @@ -592,6 +620,12 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev, > } > > mtk_crtc->layer_nr = mtk_ddp_comp_layer_nr(mtk_crtc->ddp_comp[0]); > + if (mtk_crtc->ddp_comp_nr > 1) { > + struct mtk_ddp_comp *comp = mtk_crtc->ddp_comp[1]; > + > + if (comp->funcs->bgclr_in_on) > + mtk_crtc->layer_nr += mtk_ddp_comp_layer_nr(comp); > + } > mtk_crtc->planes = devm_kcalloc(dev, mtk_crtc->layer_nr, > sizeof(struct drm_plane), > GFP_KERNEL); > -- > 1.8.1.1.dirty > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2019-07-16 23:13 UTC|newest] Thread overview: 166+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-07-08 22:33 [PATCH v4, 00/33] add drm support for MT8183 yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 01/33] dt-bindings: mediatek: add binding for mt8183 display yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 3:22 ` CK Hu 2019-07-17 3:22 ` CK Hu 2019-07-17 3:22 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 02/33] dt-bindings: mediatek: add ovl_2l description " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-24 20:15 ` Rob Herring 2019-07-24 20:15 ` Rob Herring 2019-07-24 20:15 ` Rob Herring 2019-07-08 22:33 ` [PATCH v4, 03/33] dt-bindings: mediatek: add ccorr " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w 2019-07-17 3:37 ` CK Hu 2019-07-17 3:37 ` CK Hu 2019-07-17 3:37 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 04/33] dt-bindings: mediatek: add dither " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w 2019-07-17 3:40 ` CK Hu 2019-07-17 3:40 ` CK Hu 2019-07-17 3:40 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 05/33] dt-bindings: mediatek: add RDMA1 " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-24 20:16 ` Rob Herring 2019-07-24 20:16 ` Rob Herring 2019-07-24 20:16 ` Rob Herring 2019-07-25 3:20 ` CK Hu 2019-07-25 3:20 ` CK Hu 2019-07-25 3:20 ` CK Hu 2019-07-25 22:23 ` Rob Herring 2019-07-25 22:23 ` Rob Herring 2019-07-25 22:23 ` Rob Herring 2019-07-08 22:33 ` [PATCH v4, 06/33] dt-bindings: mediatek: add mutex " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-16 23:59 ` Ryan Case 2019-07-16 23:59 ` Ryan Case 2019-07-08 22:33 ` [PATCH v4, 07/33] arm64: dts: add display nodes for mt8183 yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 08/33] drm/mediatek: add mutex mod into ddp private data yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 5:22 ` CK Hu 2019-07-17 5:22 ` CK Hu 2019-07-17 5:22 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 09/33] drm/mediatek: add mutex mod register offset " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu-NuS5LvNUpcJWk0Htik3J/w 2019-07-17 5:23 ` CK Hu 2019-07-17 5:23 ` CK Hu 2019-07-17 5:23 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 10/33] drm/mediatek: add mutex sof " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 5:28 ` CK Hu 2019-07-17 5:28 ` CK Hu 2019-07-17 5:28 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 11/33] drm/mediatek: add mutex sof register offset " yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 5:31 ` CK Hu 2019-07-17 5:31 ` CK Hu 2019-07-17 5:31 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 12/33] drm/mediatek: split DISP_REG_CONFIG_DSI_SEL setting into another use case yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 5:35 ` CK Hu 2019-07-17 5:35 ` CK Hu 2019-07-17 5:35 ` CK Hu 2019-08-29 12:39 ` Yongqiang Niu 2019-08-29 12:39 ` Yongqiang Niu 2019-08-29 12:39 ` Yongqiang Niu 2019-07-08 22:33 ` [PATCH v4, 13/33] drm/mediatek: add mmsys private data for ddp path config yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-17 5:46 ` CK Hu 2019-07-17 5:46 ` CK Hu 2019-07-17 5:46 ` CK Hu 2019-07-08 22:33 ` [PATCH v4, 14/33] drm/mediatek: move rdma sout from mtk_ddp_mout_en into mtk_ddp_sout_sel yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 15/33] drm/mediatek: add ddp component CCORR yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 16/33] drm/mediatek: add commponent OVL_2L0 yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 17/33] drm/mediatek: add component OVL_2L1 yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 18/33] drm/mediatek: add component DITHER yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` [PATCH v4, 19/33] drm/mediatek: add gmc_bits for ovl private data yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:33 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 20/33] drm/medaitek: add layer_nr " yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 21/33] drm/mediatek: add function to background color input select for ovl/ovl_2l direct link yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-17 5:53 ` CK Hu 2019-07-17 5:53 ` CK Hu 2019-07-17 5:53 ` CK Hu 2019-07-08 22:34 ` [PATCH v4, 22/33] drm/mediatek: add background color input select function for ovl/ovl_2l yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-17 5:58 ` CK Hu 2019-07-17 5:58 ` CK Hu 2019-07-17 5:58 ` CK Hu 2019-07-08 22:34 ` [PATCH v4, 23/33] drm/mediatek: add ovl0/ovl_2l0 usecase yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-16 23:13 ` Ryan Case [this message] 2019-07-16 23:13 ` Ryan Case 2019-07-17 6:47 ` CK Hu 2019-07-17 6:47 ` CK Hu 2019-07-17 6:47 ` CK Hu 2019-08-29 13:15 ` Yongqiang Niu 2019-08-29 13:15 ` Yongqiang Niu 2019-08-29 13:15 ` Yongqiang Niu 2019-07-08 22:34 ` [PATCH v4, 24/33] drm/mediatek: distinguish ovl and ovl_2l by layer_nr yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-17 6:55 ` CK Hu 2019-07-17 6:55 ` CK Hu 2019-07-17 6:55 ` CK Hu 2019-07-08 22:34 ` [PATCH v4, 25/33] drm/mediatek: add clock property check before get it yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-17 7:01 ` CK Hu 2019-07-17 7:01 ` CK Hu 2019-07-17 7:01 ` CK Hu 2019-07-08 22:34 ` [PATCH v4, 26/33] drm/mediatek: add connection from OVL0 to OVL_2L0 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 27/33] drm/mediatek: add connection from RDMA0 to COLOR0 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 28/33] drm/mediatek: add connection from RDMA1 to DSI0 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 29/33] drm/mediatek: add connection from OVL_2L0 to RDMA0 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 30/33] drm/mediatek: add connection from OVL_2L1 to RDMA1 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 31/33] drm/mediatek: add connection from DITHER0 to DSI0 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 32/33] drm/mediatek: add connection from RDMA0 " yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` [PATCH v4, 33/33] drm/mediatek: add support for mediatek SOC MT8183 yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu 2019-07-08 22:34 ` yongqiang.niu
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