Re: [v1] drm/msm/dpu: enumerate second cursor pipe for external interface

From: Rob Clark <robdclark@gmail.com>
To: Kalyan Thota <kalyan_t@codeaurora.org>
Cc: dri-devel <dri-devel@lists.freedesktop.org>,
	linux-arm-msm <linux-arm-msm@vger.kernel.org>,
	freedreno <freedreno@lists.freedesktop.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Sean Paul <seanpaul@chromium.org>,
	"Kristian H. Kristensen" <hoegsberg@chromium.org>,
	Douglas Anderson <dianders@chromium.org>,
	Krishna Manikandan <mkrishn@codeaurora.org>,
	Raviteja Tamatam <travitej@codeaurora.org>,
	nganji@codeaurora.org, Stephen Boyd <swboyd@chromium.org>
Subject: Re: [v1] drm/msm/dpu: enumerate second cursor pipe for external interface
Date: Fri, 10 Jul 2020 09:49:04 -0700	[thread overview]
Message-ID: <CAF6AEGtPDh7q6Hjophdyz+Pvi93-bK5WULGeSw9P4BWRw5SWxQ@mail.gmail.com> (raw)
In-Reply-To: <1593089153-17811-1-git-send-email-kalyan_t@codeaurora.org>

On Thu, Jun 25, 2020 at 5:46 AM Kalyan Thota <kalyan_t@codeaurora.org> wrote:
>
> Setup an RGB HW pipe as cursor which can be used on
> secondary interface.
>
> For SC7180 2 HW pipes are enumerated as cursors
> 1 - primary interface
> 2 - secondary interface
>
> Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 8f2357d..23061fd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -117,10 +117,10 @@
>                 .reg_off = 0x2AC, .bit_off = 0},
>         .clk_ctrls[DPU_CLK_CTRL_DMA0] = {
>                 .reg_off = 0x2AC, .bit_off = 8},
> -       .clk_ctrls[DPU_CLK_CTRL_DMA1] = {
> -               .reg_off = 0x2B4, .bit_off = 8},
>         .clk_ctrls[DPU_CLK_CTRL_CURSOR0] = {
> -               .reg_off = 0x2BC, .bit_off = 8},
> +               .reg_off = 0x2B4, .bit_off = 8},
> +       .clk_ctrls[DPU_CLK_CTRL_CURSOR1] = {
> +               .reg_off = 0x2C4, .bit_off = 8},

It looks like you shifted the register offset here from 0x2bc to
0x2c4, was that intentional?

BR,
-R

>         },
>  };
>
> @@ -272,10 +272,10 @@
>                 sc7180_vig_sblk_0, 0,  SSPP_TYPE_VIG, DPU_CLK_CTRL_VIG0),
>         SSPP_BLK("sspp_8", SSPP_DMA0, 0x24000,  DMA_SDM845_MASK,
>                 sdm845_dma_sblk_0, 1, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA0),
> -       SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000,  DMA_SDM845_MASK,
> -               sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_DMA1),
> +       SSPP_BLK("sspp_9", SSPP_DMA1, 0x26000,  DMA_CURSOR_SDM845_MASK,
> +               sdm845_dma_sblk_1, 5, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
>         SSPP_BLK("sspp_10", SSPP_DMA2, 0x28000,  DMA_CURSOR_SDM845_MASK,
> -               sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR0),
> +               sdm845_dma_sblk_2, 9, SSPP_TYPE_DMA, DPU_CLK_CTRL_CURSOR1),
>  };
>
>  /*************************************************************
> --
> 1.9.1
>