From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Samuel Ortiz <sameo@linux.intel.com>,
Lee Jones <lee.jones@linaro.org>,
Rob Herring <robh+dt@kernel.org>,
Mike Turquette <mturquette@linaro.org>,
Emilio Lopez <emilio@elopez.com.ar>,
Linus Walleij <linus.walleij@linaro.org>,
linux-serial@vger.kernel.org,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
devicetree <devicetree@vger.kernel.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
Hans de Goede <hdegoede@redhat.com>,
Boris BREZILLON <boris.brezillon@free-electrons.com>,
Luc Verhaegen <libv@skynet.be>
Subject: Re: [PATCH 15/22] pinctrl: sunxi: Add A23 PIO controller support
Date: Tue, 17 Jun 2014 18:25:14 +0800 [thread overview]
Message-ID: <CAGb2v670r+imY1PPKXOvLGjHOTzgXaaUqP6SstsvrXFhMozAzA@mail.gmail.com> (raw)
In-Reply-To: <20140525190827.GV10768@lukather>
Hi,
On Mon, May 26, 2014 at 3:08 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Fri, May 23, 2014 at 03:51:18PM +0800, Chen-Yu Tsai wrote:
>> The A23 uses the same pin controller as previous SoC's from Allwinner.
>> Add support for the pins controlled by the main PIO controller.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 +
>> drivers/pinctrl/sunxi/Kconfig | 4 +
>> drivers/pinctrl/sunxi/Makefile | 1 +
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 562 +++++++++++++++++++++
>> 4 files changed, 569 insertions(+)
>> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> index d8d0656..93ce12e 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> @@ -13,6 +13,8 @@ Required properties:
>> "allwinner,sun6i-a31-pinctrl"
>> "allwinner,sun6i-a31-r-pinctrl"
>> "allwinner,sun7i-a20-pinctrl"
>> + "allwinner,sun8i-a23-pinctrl"
>> + "allwinner,sun8i-a23-r-pinctrl"
>
> This last line belongs in the R_PIO patch :)
>
>> - reg: Should contain the register physical address and length for the
>> pin controller.
>>
>> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
>> index da1e830..17a4281 100644
>> --- a/drivers/pinctrl/sunxi/Kconfig
>> +++ b/drivers/pinctrl/sunxi/Kconfig
>> @@ -32,4 +32,8 @@ config PINCTRL_SUN7I_A20
>> def_bool PINCTRL_SUNXI || MACH_SUN7I
>> select PINCTRL_SUNXI_COMMON
>>
>> +config PINCTRL_SUN8I_A23
>> + def_bool PINCTRL_SUNXI || MACH_SUN8I
>> + select PINCTRL_SUNXI_COMMON
>
> Since it's going to be merged in 3.16, you can just depend on MACH_SUN8I.
Just want to make sure before I send v2 of the whole series, this should be
def_bool MACH_SUN8I
select PINCTRL_SUNXI_COMMON
correct?
Or should it be
bool
depends on MACH_SUN8I
select PINCTRL_SUNXI_COMMON
and MACH_SUN8I selects PINCTRL_SUN8I_A23
I'm not sure what the transition plan was.
>> endif
[...]
v2 will also have EINT support.
Thanks
ChenYu
WARNING: multiple messages have this Message-ID (diff)
From: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Greg Kroah-Hartman
<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mike Turquette
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Emilio Lopez <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
Linus Walleij
<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-kernel
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Hans de Goede <hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
Boris BREZILLON
<boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Luc Verhaegen <libv-AgBVmzD5pcezQB+pC5nmwQ@public.gmane.org>
Subject: Re: [PATCH 15/22] pinctrl: sunxi: Add A23 PIO controller support
Date: Tue, 17 Jun 2014 18:25:14 +0800 [thread overview]
Message-ID: <CAGb2v670r+imY1PPKXOvLGjHOTzgXaaUqP6SstsvrXFhMozAzA@mail.gmail.com> (raw)
In-Reply-To: <20140525190827.GV10768@lukather>
Hi,
On Mon, May 26, 2014 at 3:08 AM, Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> On Fri, May 23, 2014 at 03:51:18PM +0800, Chen-Yu Tsai wrote:
>> The A23 uses the same pin controller as previous SoC's from Allwinner.
>> Add support for the pins controlled by the main PIO controller.
>>
>> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
>> ---
>> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 +
>> drivers/pinctrl/sunxi/Kconfig | 4 +
>> drivers/pinctrl/sunxi/Makefile | 1 +
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 562 +++++++++++++++++++++
>> 4 files changed, 569 insertions(+)
>> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> index d8d0656..93ce12e 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> @@ -13,6 +13,8 @@ Required properties:
>> "allwinner,sun6i-a31-pinctrl"
>> "allwinner,sun6i-a31-r-pinctrl"
>> "allwinner,sun7i-a20-pinctrl"
>> + "allwinner,sun8i-a23-pinctrl"
>> + "allwinner,sun8i-a23-r-pinctrl"
>
> This last line belongs in the R_PIO patch :)
>
>> - reg: Should contain the register physical address and length for the
>> pin controller.
>>
>> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
>> index da1e830..17a4281 100644
>> --- a/drivers/pinctrl/sunxi/Kconfig
>> +++ b/drivers/pinctrl/sunxi/Kconfig
>> @@ -32,4 +32,8 @@ config PINCTRL_SUN7I_A20
>> def_bool PINCTRL_SUNXI || MACH_SUN7I
>> select PINCTRL_SUNXI_COMMON
>>
>> +config PINCTRL_SUN8I_A23
>> + def_bool PINCTRL_SUNXI || MACH_SUN8I
>> + select PINCTRL_SUNXI_COMMON
>
> Since it's going to be merged in 3.16, you can just depend on MACH_SUN8I.
Just want to make sure before I send v2 of the whole series, this should be
def_bool MACH_SUN8I
select PINCTRL_SUNXI_COMMON
correct?
Or should it be
bool
depends on MACH_SUN8I
select PINCTRL_SUNXI_COMMON
and MACH_SUN8I selects PINCTRL_SUN8I_A23
I'm not sure what the transition plan was.
>> endif
[...]
v2 will also have EINT support.
Thanks
ChenYu
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WARNING: multiple messages have this Message-ID (diff)
From: wens@csie.org (Chen-Yu Tsai)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 15/22] pinctrl: sunxi: Add A23 PIO controller support
Date: Tue, 17 Jun 2014 18:25:14 +0800 [thread overview]
Message-ID: <CAGb2v670r+imY1PPKXOvLGjHOTzgXaaUqP6SstsvrXFhMozAzA@mail.gmail.com> (raw)
In-Reply-To: <20140525190827.GV10768@lukather>
Hi,
On Mon, May 26, 2014 at 3:08 AM, Maxime Ripard
<maxime.ripard@free-electrons.com> wrote:
> On Fri, May 23, 2014 at 03:51:18PM +0800, Chen-Yu Tsai wrote:
>> The A23 uses the same pin controller as previous SoC's from Allwinner.
>> Add support for the pins controlled by the main PIO controller.
>>
>> Signed-off-by: Chen-Yu Tsai <wens@csie.org>
>> ---
>> .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 2 +
>> drivers/pinctrl/sunxi/Kconfig | 4 +
>> drivers/pinctrl/sunxi/Makefile | 1 +
>> drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c | 562 +++++++++++++++++++++
>> 4 files changed, 569 insertions(+)
>> create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-a23.c
>>
>> diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> index d8d0656..93ce12e 100644
>> --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>> @@ -13,6 +13,8 @@ Required properties:
>> "allwinner,sun6i-a31-pinctrl"
>> "allwinner,sun6i-a31-r-pinctrl"
>> "allwinner,sun7i-a20-pinctrl"
>> + "allwinner,sun8i-a23-pinctrl"
>> + "allwinner,sun8i-a23-r-pinctrl"
>
> This last line belongs in the R_PIO patch :)
>
>> - reg: Should contain the register physical address and length for the
>> pin controller.
>>
>> diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig
>> index da1e830..17a4281 100644
>> --- a/drivers/pinctrl/sunxi/Kconfig
>> +++ b/drivers/pinctrl/sunxi/Kconfig
>> @@ -32,4 +32,8 @@ config PINCTRL_SUN7I_A20
>> def_bool PINCTRL_SUNXI || MACH_SUN7I
>> select PINCTRL_SUNXI_COMMON
>>
>> +config PINCTRL_SUN8I_A23
>> + def_bool PINCTRL_SUNXI || MACH_SUN8I
>> + select PINCTRL_SUNXI_COMMON
>
> Since it's going to be merged in 3.16, you can just depend on MACH_SUN8I.
Just want to make sure before I send v2 of the whole series, this should be
def_bool MACH_SUN8I
select PINCTRL_SUNXI_COMMON
correct?
Or should it be
bool
depends on MACH_SUN8I
select PINCTRL_SUNXI_COMMON
and MACH_SUN8I selects PINCTRL_SUN8I_A23
I'm not sure what the transition plan was.
>> endif
[...]
v2 will also have EINT support.
Thanks
ChenYu
next prev parent reply other threads:[~2014-06-17 10:25 UTC|newest]
Thread overview: 153+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 7:51 [PATCH 00/21] ARM: sunxi: Introduce Allwinner A23 (sun8i) support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 01/22] serial: 8250_dw: Add optional reset control support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 8:19 ` Arnd Bergmann
2014-05-23 8:19 ` Arnd Bergmann
2014-05-23 7:51 ` [PATCH 02/22] clk: sunxi: register clock gates with clkdev Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:47 ` Maxime Ripard
2014-05-25 18:47 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 03/22] clk: sunxi: add "pll6" to sun6i protected clock list Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:48 ` Maxime Ripard
2014-05-25 18:48 ` Maxime Ripard
2014-05-26 4:47 ` Chen-Yu Tsai
2014-05-26 4:47 ` Chen-Yu Tsai
2014-05-26 4:47 ` Chen-Yu Tsai
2014-05-27 8:32 ` Maxime Ripard
2014-05-27 8:32 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 04/22] clk: sunxi: move "ahb_sdram" to " Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:51 ` Maxime Ripard
2014-05-25 18:51 ` Maxime Ripard
2014-05-26 9:43 ` Chen-Yu Tsai
2014-05-26 9:43 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 05/22] clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 06/22] clk: sunxi: Support factor clocks with N multiplier factor starting from 1 Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:43 ` Maxime Ripard
2014-05-25 18:43 ` Maxime Ripard
2014-05-25 18:43 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 07/22] clk: sunxi: Fix PLL6 calculation on sun6i Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 13:09 ` Emilio López
2014-05-23 13:09 ` Emilio López
2014-05-23 13:09 ` Emilio López
2014-05-23 14:43 ` Chen-Yu Tsai
2014-05-23 14:43 ` Chen-Yu Tsai
2014-05-23 14:43 ` Chen-Yu Tsai
2014-05-25 18:43 ` Maxime Ripard
2014-05-25 18:43 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 08/22] clk: sunxi: Specify number of child clocks for divs clocks Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 09/22] clk: sunxi: Implement A31 PLL6 as a divs clock for 2x output Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:56 ` Maxime Ripard
2014-05-25 18:56 ` Maxime Ripard
2014-05-25 18:56 ` Maxime Ripard
2014-05-26 3:47 ` Chen-Yu Tsai
2014-05-26 3:47 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 10/22] clk: sunxi: Add support for PLL6 pre-divider on AHB1 clock Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:02 ` Maxime Ripard
2014-05-25 19:02 ` Maxime Ripard
2014-05-25 19:02 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 11/22] ARM: sun6i: DT: Add PLL6 multiple outputs Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:59 ` Maxime Ripard
2014-05-25 18:59 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 12/22] ARM: sun6i: DT: Add PLL6 pre-divider clock for AHB1 mux input Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 13/22] clk: sunxi: Add A23 clocks support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:05 ` Maxime Ripard
2014-05-25 19:05 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 14/22] clk: sunxi: Add A23 APB0 support to sun6i-a31-apb0-clk Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 15/22] pinctrl: sunxi: Add A23 PIO controller support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:08 ` Maxime Ripard
2014-05-25 19:08 ` Maxime Ripard
2014-06-17 10:25 ` Chen-Yu Tsai [this message]
2014-06-17 10:25 ` Chen-Yu Tsai
2014-06-17 10:25 ` Chen-Yu Tsai
2014-06-17 14:18 ` Maxime Ripard
2014-06-17 14:18 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 16/22] pinctrl: sunxi: Add A23 R_PIO " Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:11 ` Maxime Ripard
2014-05-25 19:11 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 17/22] mfd: sun6i-prcm: Add support for Allwinner A23 PRCM Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:14 ` Maxime Ripard
2014-05-25 19:14 ` Maxime Ripard
2014-05-26 4:36 ` Chen-Yu Tsai
2014-05-26 4:36 ` Chen-Yu Tsai
2014-05-27 8:30 ` Maxime Ripard
2014-05-27 8:30 ` Maxime Ripard
2014-05-29 4:23 ` Chen-Yu Tsai
2014-05-29 4:23 ` Chen-Yu Tsai
2014-05-29 19:31 ` Maxime Ripard
2014-05-29 19:31 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 18/22] ARM: sunxi: Introduce Allwinner A23 support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:22 ` Maxime Ripard
2014-05-25 19:22 ` Maxime Ripard
2014-05-25 19:22 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 19/22] ARM: sunxi: Add earlyprintk support using R_UART (sun6i/sun8i) Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 18:46 ` Maxime Ripard
2014-05-25 18:46 ` Maxime Ripard
2014-05-26 9:25 ` Chen-Yu Tsai
2014-05-26 9:25 ` Chen-Yu Tsai
2014-05-27 8:34 ` Maxime Ripard
2014-05-27 8:34 ` Maxime Ripard
2014-05-23 7:51 ` [PATCH 20/22] ARM: sun8i: Add SMP support for the Allwinner A23 Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:26 ` Maxime Ripard
2014-05-25 19:26 ` Maxime Ripard
2014-05-26 3:57 ` Chen-Yu Tsai
2014-05-26 3:57 ` Chen-Yu Tsai
2014-05-27 8:09 ` Marc Zyngier
2014-05-27 8:09 ` Marc Zyngier
2014-05-27 8:09 ` Marc Zyngier
2014-05-23 7:51 ` [PATCH 21/22] ARM: sunxi: Add Allwinner A23 dtsi Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:38 ` Maxime Ripard
2014-05-25 19:38 ` Maxime Ripard
2014-05-26 4:02 ` Chen-Yu Tsai
2014-05-26 4:02 ` Chen-Yu Tsai
2014-05-23 7:51 ` [PATCH 22/22] ARM: sun8i: dt: Add Ippo-q8h v5 support Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-23 7:51 ` Chen-Yu Tsai
2014-05-25 19:39 ` Maxime Ripard
2014-05-25 19:39 ` Maxime Ripard
2014-05-26 4:23 ` Chen-Yu Tsai
2014-05-26 4:23 ` Chen-Yu Tsai
2014-05-26 4:23 ` Chen-Yu Tsai
2014-05-27 8:22 ` Maxime Ripard
2014-05-27 8:22 ` Maxime Ripard
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