From: Alistair Francis <alistair23@gmail.com> To: Bin Meng <bmeng.cn@gmail.com> Cc: "open list:RISC-V" <qemu-riscv@nongnu.org>, Qemu-block <qemu-block@nongnu.org>, "Bin Meng" <bin.meng@windriver.com>, "Philippe Mathieu-Daudé" <f4bug@amsat.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, "Alistair Francis" <alistair.francis@wdc.com> Subject: Re: [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information Date: Tue, 5 Jan 2021 13:16:08 -0800 [thread overview] Message-ID: <CAKmqyKPkumt2b-EWfLbAYGDO2295HjBibkBMZ+WPbkTtNozxOQ@mail.gmail.com> (raw) In-Reply-To: <20201231113010.27108-3-bmeng.cn@gmail.com> On Thu, Dec 31, 2020 at 3:32 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > This updates the flash information table to include various ISSI > flashes that are supported by upstream U-Boot and Linux kernel. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > hw/block/m25p80.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c > index 8a62bc4bc4..e82deb41c6 100644 > --- a/hw/block/m25p80.c > +++ b/hw/block/m25p80.c > @@ -209,6 +209,19 @@ static const FlashPartInfo known_devices[] = { > { INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) }, > { INFO("n25q064", 0x20ba17, 0, 64 << 10, 128, 0) }, > > + /* ISSI */ > + { INFO("is25lq040b", 0x9d4013, 0, 64 << 10, 8, ER_4K) }, > + { INFO("is25lp080d", 0x9d6014, 0, 64 << 10, 16, ER_4K) }, > + { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32, ER_4K) }, > + { INFO("is25lp032", 0x9d6016, 0, 64 << 10, 64, ER_4K) }, > + { INFO("is25lp064", 0x9d6017, 0, 64 << 10, 128, ER_4K) }, > + { INFO("is25lp128", 0x9d6018, 0, 64 << 10, 256, ER_4K) }, > + { INFO("is25lp256", 0x9d6019, 0, 64 << 10, 512, ER_4K) }, > + { INFO("is25wp032", 0x9d7016, 0, 64 << 10, 64, ER_4K) }, > + { INFO("is25wp064", 0x9d7017, 0, 64 << 10, 128, ER_4K) }, > + { INFO("is25wp128", 0x9d7018, 0, 64 << 10, 256, ER_4K) }, > + { INFO("is25wp256", 0x9d7019, 0, 64 << 10, 512, ER_4K) }, > + > /* Macronix */ > { INFO("mx25l2005a", 0xc22012, 0, 64 << 10, 4, ER_4K) }, > { INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) }, > -- > 2.25.1 > >
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com> To: Bin Meng <bmeng.cn@gmail.com> Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, "Alistair Francis" <alistair.francis@wdc.com>, Qemu-block <qemu-block@nongnu.org>, "open list:RISC-V" <qemu-riscv@nongnu.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, "Bin Meng" <bin.meng@windriver.com> Subject: Re: [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information Date: Tue, 5 Jan 2021 13:16:08 -0800 [thread overview] Message-ID: <CAKmqyKPkumt2b-EWfLbAYGDO2295HjBibkBMZ+WPbkTtNozxOQ@mail.gmail.com> (raw) In-Reply-To: <20201231113010.27108-3-bmeng.cn@gmail.com> On Thu, Dec 31, 2020 at 3:32 AM Bin Meng <bmeng.cn@gmail.com> wrote: > > From: Bin Meng <bin.meng@windriver.com> > > This updates the flash information table to include various ISSI > flashes that are supported by upstream U-Boot and Linux kernel. > > Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > hw/block/m25p80.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c > index 8a62bc4bc4..e82deb41c6 100644 > --- a/hw/block/m25p80.c > +++ b/hw/block/m25p80.c > @@ -209,6 +209,19 @@ static const FlashPartInfo known_devices[] = { > { INFO("640s33b", 0x898913, 0, 64 << 10, 128, 0) }, > { INFO("n25q064", 0x20ba17, 0, 64 << 10, 128, 0) }, > > + /* ISSI */ > + { INFO("is25lq040b", 0x9d4013, 0, 64 << 10, 8, ER_4K) }, > + { INFO("is25lp080d", 0x9d6014, 0, 64 << 10, 16, ER_4K) }, > + { INFO("is25lp016d", 0x9d6015, 0, 64 << 10, 32, ER_4K) }, > + { INFO("is25lp032", 0x9d6016, 0, 64 << 10, 64, ER_4K) }, > + { INFO("is25lp064", 0x9d6017, 0, 64 << 10, 128, ER_4K) }, > + { INFO("is25lp128", 0x9d6018, 0, 64 << 10, 256, ER_4K) }, > + { INFO("is25lp256", 0x9d6019, 0, 64 << 10, 512, ER_4K) }, > + { INFO("is25wp032", 0x9d7016, 0, 64 << 10, 64, ER_4K) }, > + { INFO("is25wp064", 0x9d7017, 0, 64 << 10, 128, ER_4K) }, > + { INFO("is25wp128", 0x9d7018, 0, 64 << 10, 256, ER_4K) }, > + { INFO("is25wp256", 0x9d7019, 0, 64 << 10, 512, ER_4K) }, > + > /* Macronix */ > { INFO("mx25l2005a", 0xc22012, 0, 64 << 10, 4, ER_4K) }, > { INFO("mx25l4005a", 0xc22013, 0, 64 << 10, 8, ER_4K) }, > -- > 2.25.1 > >
next prev parent reply other threads:[~2021-01-05 21:17 UTC|newest] Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-12-31 11:29 [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support Bin Meng 2020-12-31 11:29 ` [PATCH 01/22] hw/block: m25p80: Add ISSI SPI flash support Bin Meng 2021-01-04 16:00 ` Francisco Iglesias 2021-01-04 16:00 ` Francisco Iglesias 2021-01-04 23:30 ` Bin Meng 2021-01-04 23:30 ` Bin Meng 2020-12-31 11:29 ` [PATCH 02/22] hw/block: m25p80: Add various ISSI flash information Bin Meng 2021-01-05 21:16 ` Alistair Francis [this message] 2021-01-05 21:16 ` Alistair Francis 2020-12-31 11:29 ` [PATCH 03/22] hw/sd: ssi-sd: Fix incorrect card response sequence Bin Meng 2021-01-02 13:49 ` Pragnesh Patel 2021-01-02 13:49 ` Pragnesh Patel 2020-12-31 11:29 ` [PATCH 04/22] hw/sd: sd: Support CMD59 for SPI mode Bin Meng 2021-01-02 13:50 ` Pragnesh Patel 2021-01-02 13:50 ` Pragnesh Patel 2020-12-31 11:29 ` [PATCH 05/22] hw/sd: sd: Drop sd_crc16() Bin Meng 2021-01-02 13:53 ` Pragnesh Patel 2021-01-02 13:53 ` Pragnesh Patel 2021-01-14 11:51 ` Philippe Mathieu-Daudé 2020-12-31 11:29 ` [PATCH 06/22] util: Add CRC16 (CCITT) calculation routines Bin Meng 2021-01-14 20:20 ` Alistair Francis 2021-01-14 20:20 ` Alistair Francis 2020-12-31 11:29 ` [PATCH 07/22] hw/sd: ssi-sd: Suffix a data block with CRC16 Bin Meng 2021-01-13 16:54 ` Alistair Francis 2021-01-13 16:54 ` Alistair Francis 2020-12-31 11:29 ` [PATCH 08/22] hw/sd: ssi-sd: Support multiple block read (CMD18) Bin Meng 2021-01-13 16:59 ` Alistair Francis 2021-01-13 16:59 ` Alistair Francis 2020-12-31 11:29 ` [PATCH 09/22] hw/sd: ssi-sd: Use macros for the dummy value and tokens in the transfer Bin Meng 2021-01-13 17:00 ` Alistair Francis 2021-01-13 17:00 ` Alistair Francis 2021-01-14 11:40 ` Philippe Mathieu-Daudé 2020-12-31 11:29 ` [PATCH 10/22] hw/sd: sd: Remove duplicated codes in single/multiple block read/write Bin Meng 2021-01-13 17:02 ` Alistair Francis 2021-01-13 17:02 ` Alistair Francis 2020-12-31 11:29 ` [PATCH 11/22] hw/sd: sd: Allow single/multiple block write for SPI mode Bin Meng 2021-01-13 17:03 ` Alistair Francis 2021-01-13 17:03 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 12/22] hw/sd: sd.h: Cosmetic change of using spaces Bin Meng 2021-01-13 17:59 ` Alistair Francis 2021-01-13 17:59 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 13/22] hw/sd: Introduce receive_ready() callback Bin Meng 2021-01-13 17:22 ` Alistair Francis 2021-01-13 17:22 ` Alistair Francis 2021-01-14 11:44 ` Philippe Mathieu-Daudé 2020-12-31 11:30 ` [PATCH 14/22] hw/sd: ssi-sd: Support single block write Bin Meng 2021-01-13 18:07 ` Alistair Francis 2021-01-13 18:07 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 15/22] hw/sd: ssi-sd: Support multiple " Bin Meng 2021-01-13 18:11 ` Alistair Francis 2021-01-13 18:11 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 16/22] hw/ssi: Add SiFive SPI controller support Bin Meng 2021-01-13 18:28 ` Alistair Francis 2021-01-13 18:28 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 17/22] hw/riscv: sifive_u: Add QSPI0 controller and connect a flash Bin Meng 2021-01-13 18:30 ` Alistair Francis 2021-01-13 18:30 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 18/22] hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card Bin Meng 2021-01-13 18:32 ` Alistair Francis 2021-01-13 18:32 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 19/22] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value Bin Meng 2021-01-13 18:33 ` Alistair Francis 2021-01-13 18:33 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 20/22] docs/system: Sort targets in alphabetical order Bin Meng 2021-01-13 18:33 ` Alistair Francis 2021-01-13 18:33 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 21/22] docs/system: Add RISC-V documentation Bin Meng 2021-01-14 0:11 ` Alistair Francis 2021-01-14 0:11 ` Alistair Francis 2020-12-31 11:30 ` [PATCH 22/22] docs/system: riscv: Add documentation for sifive_u machine Bin Meng 2021-01-14 0:11 ` Alistair Francis 2021-01-14 0:11 ` Alistair Francis 2021-01-02 12:26 ` [PATCH 00/22] hw/riscv: sifive_u: Add missing SPI support Pragnesh Patel 2021-01-02 12:26 ` Pragnesh Patel 2021-01-02 13:15 ` Bin Meng 2021-01-02 13:15 ` Bin Meng 2021-01-02 13:30 ` Pragnesh Patel 2021-01-02 13:30 ` Pragnesh Patel 2021-01-02 13:36 ` Bin Meng 2021-01-02 13:36 ` Bin Meng
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=CAKmqyKPkumt2b-EWfLbAYGDO2295HjBibkBMZ+WPbkTtNozxOQ@mail.gmail.com \ --to=alistair23@gmail.com \ --cc=alistair.francis@wdc.com \ --cc=bin.meng@windriver.com \ --cc=bmeng.cn@gmail.com \ --cc=f4bug@amsat.org \ --cc=qemu-block@nongnu.org \ --cc=qemu-devel@nongnu.org \ --cc=qemu-riscv@nongnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.