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From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>,
	Fabio Estevam <festevam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Gustavo Pimentel
	<gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>,
	Heiko Stuebner <heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org>,
	Hou Zhiqiang <Zhiqiang.Hou-3arQi8VN3Tc@public.gmane.org>,
	Jingoo Han <jingoohan1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Jonathan Hunter
	<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
	Karthikeyan Mitran
	<m.karthikeyan-DTHOJn6Rh8lhmhkoCovsdw@public.gmane.org>,
	Linus Walleij
	<linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Lucas Stach <l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Marek Vasut
	<marek.vasut+renesas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	Michal Simek
	<michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>,
	Murali Karicheri <m-karicheri2-l0cyMroinI0@public.gmane.org>,
	NXP Linux Team <linux-imx-3arQi8VN3Tc@public.gmane.org>,
	Pengutronix Kernel Team
	<kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Richard Zhu <hongxing.zhu-3arQi8VN3Tc@public.gmane.org>,
	Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
	Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Subject: Re: [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers
Date: Thu, 23 Jul 2020 10:55:55 -0600	[thread overview]
Message-ID: <CAL_JsqKFVuJGcCTgANF_R8EcvrTGw8WdOT1SDfAMSYrimGgKKQ@mail.gmail.com> (raw)
In-Reply-To: <20200723162148.GA11749-LhTu/34fCX3ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>

On Thu, Jul 23, 2020 at 10:21 AM Lorenzo Pieralisi
<lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org> wrote:
>
> On Thu, Jul 23, 2020 at 09:26:01AM -0600, Rob Herring wrote:
> > On Tue, Jul 21, 2020 at 8:25 PM Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
> > >
> > > Most host drivers only parse the DT bus range to set the root bus number
> > > in pci_host_bridge.busnr. The ones that don't set busnr are buggy in
> > > that they ignore what's in DT. Let's set busnr in pci_scan_root_bus_bridge()
> > > where we already check for the bus resource and remove setting it in
> > > host drivers.
> > >
> > > Cc: Jingoo Han <jingoohan1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > Cc: Gustavo Pimentel <gustavo.pimentel-HKixBCOQz3hWk0Htik3J/w@public.gmane.org>
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi-5wv7dgnIgG8@public.gmane.org>
> > > Cc: Bjorn Helgaas <bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org>
> > > Cc: Thomas Petazzoni <thomas.petazzoni-LDxbnhwyfcJBDgjK7y7TUQ@public.gmane.org>
> > > Cc: Will Deacon <will-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > Cc: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > Cc: Jonathan Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > > Cc: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> > > Cc: Ryder Lee <ryder.lee-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > > Cc: Marek Vasut <marek.vasut+renesas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
> > > Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > > Cc: linux-mediatek-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
> > > Cc: linux-renesas-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
> > > Signed-off-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> > > ---
> > >  drivers/pci/controller/dwc/pcie-designware-host.c | 4 ----
> > >  drivers/pci/controller/dwc/pcie-designware.h      | 1 -
> > >  drivers/pci/controller/pci-aardvark.c             | 5 ++---
> > >  drivers/pci/controller/pci-host-common.c          | 1 -
> > >  drivers/pci/controller/pci-tegra.c                | 4 +---
> > >  drivers/pci/controller/pci-v3-semi.c              | 2 --
> > >  drivers/pci/controller/pcie-mediatek.c            | 8 +-------
> > >  drivers/pci/controller/pcie-rcar-host.c           | 1 -
> > >  drivers/pci/probe.c                               | 1 +
> > >  9 files changed, 5 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 9e8a9cfc6d3a..fa922cb876a3 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -374,9 +374,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > >                         pp->cfg0_base = pp->cfg->start;
> > >                         pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
> > >                         break;
> > > -               case IORESOURCE_BUS:
> > > -                       pp->busn = win->res;
> > > -                       break;
> > >                 }
> > >         }
> > >
> >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > > index fd2146298b58..9fb44290ed43 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > > @@ -188,7 +188,6 @@ struct pcie_port {
> > >         struct resource         *cfg;
> > >         struct resource         *io;
> > >         struct resource         *mem;
> > > -       struct resource         *busn;
> > >         int                     irq;
> > >         const struct dw_pcie_host_ops *ops;
> > >         int                     msi_irq;
> >
> > These 2 hunks should be dropped as they are breaking the Amazon driver.
> >
> > Lorenzo, do you want to fixup or I can send a fix?
>
> Done (I have not removed the hunk below though):

Right, that's correct. I'll post a separate patch removing 'pp->busn'
as that's available from the bridge struct. The bridge struct
surprisingly is not accessible from the DWC structs. I guess that's
why there's a bunch of duplication of data.

Rob

> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9e8a9cfc6d3a..9775558acdc8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -474,7 +474,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
>         }
>
>         bridge->sysdata = pp;
> -       bridge->busnr = pp->busn->start;
>         bridge->ops = &dw_pcie_ops;
>         bridge->map_irq = of_irq_parse_and_map_pci;
>         bridge->swizzle_irq = pci_common_swizzle;

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
	Fabio Estevam <festevam@gmail.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Heiko Stuebner <heiko@sntech.de>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	Linus Walleij <linus.walleij@linaro.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Michal Simek <michal.simek@xilinx.com>,
	Murali Karicheri <m-karicheri2@ti.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Ryder Lee <ryder.lee@mediatek.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Shawn Guo <shawnguo@kernel.org>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Thierry Reding <thierry.reding@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Tom Joseph <tjoseph@cadence.com>, Will Deacon <will@kernel.org>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>,
	PCI <linux-pci@vger.kernel.org>,
	"open list:MEDIA DRIVERS FOR RENESAS - FCP" 
	<linux-renesas-soc@vger.kernel.org>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	linux-tegra <linux-tegra@vger.kernel.org>
Subject: Re: [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers
Date: Thu, 23 Jul 2020 10:55:55 -0600	[thread overview]
Message-ID: <CAL_JsqKFVuJGcCTgANF_R8EcvrTGw8WdOT1SDfAMSYrimGgKKQ@mail.gmail.com> (raw)
In-Reply-To: <20200723162148.GA11749@e121166-lin.cambridge.arm.com>

On Thu, Jul 23, 2020 at 10:21 AM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Thu, Jul 23, 2020 at 09:26:01AM -0600, Rob Herring wrote:
> > On Tue, Jul 21, 2020 at 8:25 PM Rob Herring <robh@kernel.org> wrote:
> > >
> > > Most host drivers only parse the DT bus range to set the root bus number
> > > in pci_host_bridge.busnr. The ones that don't set busnr are buggy in
> > > that they ignore what's in DT. Let's set busnr in pci_scan_root_bus_bridge()
> > > where we already check for the bus resource and remove setting it in
> > > host drivers.
> > >
> > > Cc: Jingoo Han <jingoohan1@gmail.com>
> > > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Thierry Reding <thierry.reding@gmail.com>
> > > Cc: Jonathan Hunter <jonathanh@nvidia.com>
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Ryder Lee <ryder.lee@mediatek.com>
> > > Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
> > > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > Cc: linux-tegra@vger.kernel.org
> > > Cc: linux-mediatek@lists.infradead.org
> > > Cc: linux-renesas-soc@vger.kernel.org
> > > Signed-off-by: Rob Herring <robh@kernel.org>
> > > ---
> > >  drivers/pci/controller/dwc/pcie-designware-host.c | 4 ----
> > >  drivers/pci/controller/dwc/pcie-designware.h      | 1 -
> > >  drivers/pci/controller/pci-aardvark.c             | 5 ++---
> > >  drivers/pci/controller/pci-host-common.c          | 1 -
> > >  drivers/pci/controller/pci-tegra.c                | 4 +---
> > >  drivers/pci/controller/pci-v3-semi.c              | 2 --
> > >  drivers/pci/controller/pcie-mediatek.c            | 8 +-------
> > >  drivers/pci/controller/pcie-rcar-host.c           | 1 -
> > >  drivers/pci/probe.c                               | 1 +
> > >  9 files changed, 5 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 9e8a9cfc6d3a..fa922cb876a3 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -374,9 +374,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > >                         pp->cfg0_base = pp->cfg->start;
> > >                         pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
> > >                         break;
> > > -               case IORESOURCE_BUS:
> > > -                       pp->busn = win->res;
> > > -                       break;
> > >                 }
> > >         }
> > >
> >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > > index fd2146298b58..9fb44290ed43 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > > @@ -188,7 +188,6 @@ struct pcie_port {
> > >         struct resource         *cfg;
> > >         struct resource         *io;
> > >         struct resource         *mem;
> > > -       struct resource         *busn;
> > >         int                     irq;
> > >         const struct dw_pcie_host_ops *ops;
> > >         int                     msi_irq;
> >
> > These 2 hunks should be dropped as they are breaking the Amazon driver.
> >
> > Lorenzo, do you want to fixup or I can send a fix?
>
> Done (I have not removed the hunk below though):

Right, that's correct. I'll post a separate patch removing 'pp->busn'
as that's available from the bridge struct. The bridge struct
surprisingly is not accessible from the DWC structs. I guess that's
why there's a bunch of duplication of data.

Rob

> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9e8a9cfc6d3a..9775558acdc8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -474,7 +474,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
>         }
>
>         bridge->sysdata = pp;
> -       bridge->busnr = pp->busn->start;
>         bridge->ops = &dw_pcie_ops;
>         bridge->map_irq = of_irq_parse_and_map_pci;
>         bridge->swizzle_irq = pci_common_swizzle;

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	PCI <linux-pci@vger.kernel.org>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-tegra <linux-tegra@vger.kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Fabio Estevam <festevam@gmail.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Ryder Lee <ryder.lee@mediatek.com>, Will Deacon <will@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Murali Karicheri <m-karicheri2@ti.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	"open list:MEDIA DRIVERS FOR RENESAS - FCP"
	<linux-renesas-soc@vger.kernel.org>,
	Tom Joseph <tjoseph@cadence.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Jingoo Han <jingoohan1@gmail.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers
Date: Thu, 23 Jul 2020 10:55:55 -0600	[thread overview]
Message-ID: <CAL_JsqKFVuJGcCTgANF_R8EcvrTGw8WdOT1SDfAMSYrimGgKKQ@mail.gmail.com> (raw)
In-Reply-To: <20200723162148.GA11749@e121166-lin.cambridge.arm.com>

On Thu, Jul 23, 2020 at 10:21 AM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Thu, Jul 23, 2020 at 09:26:01AM -0600, Rob Herring wrote:
> > On Tue, Jul 21, 2020 at 8:25 PM Rob Herring <robh@kernel.org> wrote:
> > >
> > > Most host drivers only parse the DT bus range to set the root bus number
> > > in pci_host_bridge.busnr. The ones that don't set busnr are buggy in
> > > that they ignore what's in DT. Let's set busnr in pci_scan_root_bus_bridge()
> > > where we already check for the bus resource and remove setting it in
> > > host drivers.
> > >
> > > Cc: Jingoo Han <jingoohan1@gmail.com>
> > > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Thierry Reding <thierry.reding@gmail.com>
> > > Cc: Jonathan Hunter <jonathanh@nvidia.com>
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Ryder Lee <ryder.lee@mediatek.com>
> > > Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
> > > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > Cc: linux-tegra@vger.kernel.org
> > > Cc: linux-mediatek@lists.infradead.org
> > > Cc: linux-renesas-soc@vger.kernel.org
> > > Signed-off-by: Rob Herring <robh@kernel.org>
> > > ---
> > >  drivers/pci/controller/dwc/pcie-designware-host.c | 4 ----
> > >  drivers/pci/controller/dwc/pcie-designware.h      | 1 -
> > >  drivers/pci/controller/pci-aardvark.c             | 5 ++---
> > >  drivers/pci/controller/pci-host-common.c          | 1 -
> > >  drivers/pci/controller/pci-tegra.c                | 4 +---
> > >  drivers/pci/controller/pci-v3-semi.c              | 2 --
> > >  drivers/pci/controller/pcie-mediatek.c            | 8 +-------
> > >  drivers/pci/controller/pcie-rcar-host.c           | 1 -
> > >  drivers/pci/probe.c                               | 1 +
> > >  9 files changed, 5 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 9e8a9cfc6d3a..fa922cb876a3 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -374,9 +374,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > >                         pp->cfg0_base = pp->cfg->start;
> > >                         pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
> > >                         break;
> > > -               case IORESOURCE_BUS:
> > > -                       pp->busn = win->res;
> > > -                       break;
> > >                 }
> > >         }
> > >
> >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > > index fd2146298b58..9fb44290ed43 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > > @@ -188,7 +188,6 @@ struct pcie_port {
> > >         struct resource         *cfg;
> > >         struct resource         *io;
> > >         struct resource         *mem;
> > > -       struct resource         *busn;
> > >         int                     irq;
> > >         const struct dw_pcie_host_ops *ops;
> > >         int                     msi_irq;
> >
> > These 2 hunks should be dropped as they are breaking the Amazon driver.
> >
> > Lorenzo, do you want to fixup or I can send a fix?
>
> Done (I have not removed the hunk below though):

Right, that's correct. I'll post a separate patch removing 'pp->busn'
as that's available from the bridge struct. The bridge struct
surprisingly is not accessible from the DWC structs. I guess that's
why there's a bunch of duplication of data.

Rob

> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9e8a9cfc6d3a..9775558acdc8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -474,7 +474,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
>         }
>
>         bridge->sysdata = pp;
> -       bridge->busnr = pp->busn->start;
>         bridge->ops = &dw_pcie_ops;
>         bridge->map_irq = of_irq_parse_and_map_pci;
>         bridge->swizzle_irq = pci_common_swizzle;

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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Heiko Stuebner <heiko@sntech.de>,
	Karthikeyan Mitran <m.karthikeyan@mobiveil.co.in>,
	PCI <linux-pci@vger.kernel.org>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	linux-tegra <linux-tegra@vger.kernel.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Fabio Estevam <festevam@gmail.com>,
	Marek Vasut <marek.vasut+renesas@gmail.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Ryder Lee <ryder.lee@mediatek.com>, Will Deacon <will@kernel.org>,
	Michal Simek <michal.simek@xilinx.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	"open list:ARM/Rockchip SoC..."
	<linux-rockchip@lists.infradead.org>,
	Murali Karicheri <m-karicheri2@ti.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Hou Zhiqiang <Zhiqiang.Hou@nxp.com>,
	Richard Zhu <hongxing.zhu@nxp.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	"moderated list:ARM/Mediatek SoC support"
	<linux-mediatek@lists.infradead.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	"moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE"
	<linux-arm-kernel@lists.infradead.org>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,
	"open list:MEDIA DRIVERS FOR RENESAS - FCP"
	<linux-renesas-soc@vger.kernel.org>,
	Tom Joseph <tjoseph@cadence.com>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Jingoo Han <jingoohan1@gmail.com>,
	Shawn Guo <shawnguo@kernel.org>,
	Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers
Date: Thu, 23 Jul 2020 10:55:55 -0600	[thread overview]
Message-ID: <CAL_JsqKFVuJGcCTgANF_R8EcvrTGw8WdOT1SDfAMSYrimGgKKQ@mail.gmail.com> (raw)
In-Reply-To: <20200723162148.GA11749@e121166-lin.cambridge.arm.com>

On Thu, Jul 23, 2020 at 10:21 AM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Thu, Jul 23, 2020 at 09:26:01AM -0600, Rob Herring wrote:
> > On Tue, Jul 21, 2020 at 8:25 PM Rob Herring <robh@kernel.org> wrote:
> > >
> > > Most host drivers only parse the DT bus range to set the root bus number
> > > in pci_host_bridge.busnr. The ones that don't set busnr are buggy in
> > > that they ignore what's in DT. Let's set busnr in pci_scan_root_bus_bridge()
> > > where we already check for the bus resource and remove setting it in
> > > host drivers.
> > >
> > > Cc: Jingoo Han <jingoohan1@gmail.com>
> > > Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
> > > Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> > > Cc: Bjorn Helgaas <bhelgaas@google.com>
> > > Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> > > Cc: Will Deacon <will@kernel.org>
> > > Cc: Thierry Reding <thierry.reding@gmail.com>
> > > Cc: Jonathan Hunter <jonathanh@nvidia.com>
> > > Cc: Linus Walleij <linus.walleij@linaro.org>
> > > Cc: Ryder Lee <ryder.lee@mediatek.com>
> > > Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
> > > Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> > > Cc: linux-tegra@vger.kernel.org
> > > Cc: linux-mediatek@lists.infradead.org
> > > Cc: linux-renesas-soc@vger.kernel.org
> > > Signed-off-by: Rob Herring <robh@kernel.org>
> > > ---
> > >  drivers/pci/controller/dwc/pcie-designware-host.c | 4 ----
> > >  drivers/pci/controller/dwc/pcie-designware.h      | 1 -
> > >  drivers/pci/controller/pci-aardvark.c             | 5 ++---
> > >  drivers/pci/controller/pci-host-common.c          | 1 -
> > >  drivers/pci/controller/pci-tegra.c                | 4 +---
> > >  drivers/pci/controller/pci-v3-semi.c              | 2 --
> > >  drivers/pci/controller/pcie-mediatek.c            | 8 +-------
> > >  drivers/pci/controller/pcie-rcar-host.c           | 1 -
> > >  drivers/pci/probe.c                               | 1 +
> > >  9 files changed, 5 insertions(+), 22 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > index 9e8a9cfc6d3a..fa922cb876a3 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> > > +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> > > @@ -374,9 +374,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
> > >                         pp->cfg0_base = pp->cfg->start;
> > >                         pp->cfg1_base = pp->cfg->start + pp->cfg0_size;
> > >                         break;
> > > -               case IORESOURCE_BUS:
> > > -                       pp->busn = win->res;
> > > -                       break;
> > >                 }
> > >         }
> > >
> >
> > > diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> > > index fd2146298b58..9fb44290ed43 100644
> > > --- a/drivers/pci/controller/dwc/pcie-designware.h
> > > +++ b/drivers/pci/controller/dwc/pcie-designware.h
> > > @@ -188,7 +188,6 @@ struct pcie_port {
> > >         struct resource         *cfg;
> > >         struct resource         *io;
> > >         struct resource         *mem;
> > > -       struct resource         *busn;
> > >         int                     irq;
> > >         const struct dw_pcie_host_ops *ops;
> > >         int                     msi_irq;
> >
> > These 2 hunks should be dropped as they are breaking the Amazon driver.
> >
> > Lorenzo, do you want to fixup or I can send a fix?
>
> Done (I have not removed the hunk below though):

Right, that's correct. I'll post a separate patch removing 'pp->busn'
as that's available from the bridge struct. The bridge struct
surprisingly is not accessible from the DWC structs. I guess that's
why there's a bunch of duplication of data.

Rob

> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
> index 9e8a9cfc6d3a..9775558acdc8 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
> @@ -474,7 +474,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
>         }
>
>         bridge->sysdata = pp;
> -       bridge->busnr = pp->busn->start;
>         bridge->ops = &dw_pcie_ops;
>         bridge->map_irq = of_irq_parse_and_map_pci;
>         bridge->swizzle_irq = pci_common_swizzle;

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  parent reply	other threads:[~2020-07-23 16:55 UTC|newest]

Thread overview: 128+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-22  2:24 [PATCH 00/19] PCI: Another round of host clean-ups Rob Herring
2020-07-22  2:24 ` Rob Herring
2020-07-22  2:24 ` Rob Herring
2020-07-22  2:24 ` Rob Herring
     [not found] ` <20200722022514.1283916-1-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-22  2:24   ` [PATCH 01/19] PCI: versatile: Drop flag PCI_ENABLE_PROC_DOMAINS Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24   ` [PATCH 02/19] PCI: Set default bridge parent device Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24   ` [PATCH 03/19] PCI: Drop unnecessary zeroing of bridge fields Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24   ` [PATCH 04/19] PCI: aardvark: Use pci_is_root_bus() to check if bus is root bus Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:24     ` Rob Herring
2020-07-22  2:25   ` [PATCH 05/19] PCI: designware: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 06/19] PCI: mobiveil: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 07/19] PCI: xilinx-nwl: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 08/19] PCI: xilinx: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 09/19] PCI: rockchip: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 10/19] PCI: rcar: " Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 11/19] PCI: Move setting pci_host_bridge.busnr out of host drivers Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
     [not found]     ` <20200722022514.1283916-12-robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
2020-07-23 15:26       ` Rob Herring
2020-07-23 15:26         ` Rob Herring
2020-07-23 15:26         ` Rob Herring
2020-07-23 15:26         ` Rob Herring
     [not found]         ` <CAL_Jsq+sPaubVERLHaRzjvThk3zDO6zAnRQjGuAMKaVA87Y4HQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2020-07-23 16:21           ` Lorenzo Pieralisi
2020-07-23 16:21             ` Lorenzo Pieralisi
2020-07-23 16:21             ` Lorenzo Pieralisi
2020-07-23 16:21             ` Lorenzo Pieralisi
     [not found]             ` <20200723162148.GA11749-LhTu/34fCX3ZROr8t4l/smS4ubULX0JqMm0uRHvK7Nw@public.gmane.org>
2020-07-23 16:55               ` Rob Herring [this message]
2020-07-23 16:55                 ` Rob Herring
2020-07-23 16:55                 ` Rob Herring
2020-07-23 16:55                 ` Rob Herring
2020-07-22  2:25   ` [PATCH 12/19] PCI: cadence: Use bridge resources for outbound window setup Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 13/19] PCI: cadence: Remove private bus number and range storage Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 14/19] PCI: rcar: Use devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 15/19] PCI: rcar: Use struct pci_host_bridge.windows list directly Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 16/19] PCI: of: Reduce missing non-prefetchable memory region to a warning Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 17/19] PCI: rcar-gen2: Convert to use modern host bridge probe functions Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-08-04 12:12     ` Geert Uytterhoeven
2020-08-04 12:12       ` Geert Uytterhoeven
2020-08-04 12:12       ` Geert Uytterhoeven
2020-08-04 12:12       ` Geert Uytterhoeven
2020-08-04 15:13       ` Rob Herring
2020-08-04 15:13         ` Rob Herring
2020-08-04 15:13         ` Rob Herring
2020-08-04 15:13         ` Rob Herring
2020-07-22  2:25   ` [PATCH 18/19] PCI: Move DT resource setup into devm_pci_alloc_host_bridge() Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25   ` [PATCH 19/19] PCI: Set bridge map_irq and swizzle_irq to default functions Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2020-07-22  2:25     ` Rob Herring
2022-01-11 21:46     ` Bjorn Helgaas
2022-01-11 21:46       ` Bjorn Helgaas
2022-01-12 12:57       ` Jiaxun Yang
2022-01-12 12:57         ` Jiaxun Yang
2022-01-12 15:19         ` Bjorn Helgaas
2022-01-12 15:19           ` Bjorn Helgaas
2022-01-12 20:08           ` Jiaxun Yang
2022-01-12 20:08             ` Jiaxun Yang
2022-01-12 21:10             ` Bjorn Helgaas
2022-01-12 21:10               ` Bjorn Helgaas
2022-01-13 17:44               ` Jiaxun Yang
2022-01-13 17:44                 ` Jiaxun Yang
2022-01-12 15:09       ` Rob Herring
2022-01-12 15:09         ` Rob Herring
2022-01-12 15:32         ` Bjorn Helgaas
2022-01-12 15:32           ` Bjorn Helgaas
2022-01-29 22:34       ` Maciej W. Rozycki
2022-01-29 22:34         ` Maciej W. Rozycki
2020-07-22 21:06   ` [PATCH 00/19] PCI: Another round of host clean-ups Bjorn Helgaas
2020-07-22 21:06     ` Bjorn Helgaas
2020-07-22 21:06     ` Bjorn Helgaas
2020-07-22 21:06     ` Bjorn Helgaas
2020-07-23 10:39   ` Lorenzo Pieralisi
2020-07-23 10:39     ` Lorenzo Pieralisi
2020-07-23 10:39     ` Lorenzo Pieralisi
2020-07-23 10:39     ` Lorenzo Pieralisi
2020-07-23 23:01     ` Bjorn Helgaas
2020-07-24 15:55       ` Rob Herring

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