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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Harini Katakam <harinikatakamlinux@gmail.com>
Cc: "Mark Brown" <broonie@kernel.org>,
	"Grant Likely" <grant.likely@linaro.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Pawel Moll" <pawel.moll@arm.com>,
	"Mark Rutland" <mark.rutland@arm.com>,
	"Ian Campbell" <ijc+devicetree@hellion.org.uk>,
	"Kumar Gala" <galak@codeaurora.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
	"David Woodhouse" <dwmw2@infradead.org>,
	"Brian Norris" <computersforpeace@gmail.com>,
	"Marek Vašut" <marex@denx.de>,
	"Artem Bityutskiy" <artem.bityutskiy@linux.intel.com>,
	"Geert Uytterhoeven" <geert+renesas@linux-m68k.org>,
	"Sascha Hauer" <s.hauer@pengutronix.de>,
	"Jingoo Han" <jg1.han@samsung.com>,
	"Sourav Poddar" <sourav.poddar@ti.com>,
	"michals@xilinx.com" <michals@xilinx.com>,
	"Punnaiah Choudary Kalluri" <punnaia@xilinx.com>
Subject: Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller
Date: Thu, 10 Jul 2014 13:25:53 +0200	[thread overview]
Message-ID: <CAMuHMdVcBBNQfA--vOqwsyypwdL4HGs7YuR-SkZPttxeMeRn5g@mail.gmail.com> (raw)
In-Reply-To: <CAFcVEC+-bM91WmfwweDdTvJ7KwH+dxKDLkzsT82snWKhukLeYQ@mail.gmail.com>

Hi Harini,

On Thu, Jul 10, 2014 at 12:33 PM, Harini Katakam
<harinikatakamlinux@gmail.com> wrote:
> On Thu, Jul 10, 2014 at 3:12 PM, Geert Uytterhoeven
> <geert@linux-m68k.org> wrote:
>> On Thu, Jul 10, 2014 at 11:31 AM, Harini Katakam
>> <harinikatakamlinux@gmail.com> wrote:
>>>>> +       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
>>>>> +                           SPI_TX_DUAL | SPI_TX_QUAD;
>>>>
>>>> Your driver advertises Dual/Quad SPI Transfer capabilities, but it doesn't
>>>> check spi_transfer.[tr]x_nbits? How can it determine when to enable Dual/Quad?
>>>
>>> Here the driver is just giving information that the controller support it.
>>> The MTD layer enables dual/quad based on what the flash supports; quad
>>> being the first priority
>>> I understand that the spi core reads rx, tx-bus-width property and
>>> master support flags and
>>> performs the necessary checks.
>>
>> That's correct: as long as the rx, tx-bus-width  properties do not indicate a
>> Dual or Quad wiring, it won't be used.
>>
>> However, based on schematics, someone may set the rx, tx-bus-width properties
>> to 4, which is correct, as DT describes the hardware. But this will fail to
>> work.
>> So I think it's safer not to announce Dual/Quad support in the driver until
>> the actual driver support is there.
>
> OK. Correct me if I'm wrong but announcing this support in master->flags is
> just to say the controller supports it - Like Punnaiah mentioned in the other
> mail, nothing specific needs to be done from the controller driver to enable
> dual/quad support. This is at the SOC/IP level.
> I agree it might or might not be supported at board-level.

IC. So this is not a generic SPI controller, but a controller meant for QSPI
FLASHes? I.e. if you would connect a different device, the controller may
unexpectedly use Dual or Quad mode if it sees a byte fly by that looks like
a Quad SPI FLASH read command?

> But that's based on the user's hardware. Should master->flags
> really take this into consideration?

You mean master->mode_bits?

> BTW, I dint see master->mode_bits being used anywhere at the moment.

It is used to match SPI controller and slave features, cfr. spi_setup() in
drivers/spi/spi.c.

If Dual/Quad is supported, the bits should be set. Else spi_setup() will
clear the bits in the SPI slave's mode field, disabling Dual/Quad transfers.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>
To: Harini Katakam
	<harinikatakamlinux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Grant Likely"
	<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	"Rob Herring" <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	"Pawel Moll" <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
	"Mark Rutland" <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	"Ian Campbell"
	<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
	"Kumar Gala" <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	linux-spi <linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
	<linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	"David Woodhouse" <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
	"Brian Norris"
	<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
	"Marek Vašut" <marex-ynQEQJNshbs@public.gmane.org>,
	"Artem Bityutskiy"
	<artem.bityutskiy-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
	"Geert Uytterhoeven"
	<geert+renesas-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>,
	"Sascha Hauer" <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
	"Jingoo Han" <jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>,
	"Sourav Poddar" <sourav.poddar-l0cyMroinI0@public.gmane.org>,
	"michals-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org"
	<michals-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
Subject: Re: [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller
Date: Thu, 10 Jul 2014 13:25:53 +0200	[thread overview]
Message-ID: <CAMuHMdVcBBNQfA--vOqwsyypwdL4HGs7YuR-SkZPttxeMeRn5g@mail.gmail.com> (raw)
In-Reply-To: <CAFcVEC+-bM91WmfwweDdTvJ7KwH+dxKDLkzsT82snWKhukLeYQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

Hi Harini,

On Thu, Jul 10, 2014 at 12:33 PM, Harini Katakam
<harinikatakamlinux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> On Thu, Jul 10, 2014 at 3:12 PM, Geert Uytterhoeven
> <geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org> wrote:
>> On Thu, Jul 10, 2014 at 11:31 AM, Harini Katakam
>> <harinikatakamlinux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>>>>> +       master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD |
>>>>> +                           SPI_TX_DUAL | SPI_TX_QUAD;
>>>>
>>>> Your driver advertises Dual/Quad SPI Transfer capabilities, but it doesn't
>>>> check spi_transfer.[tr]x_nbits? How can it determine when to enable Dual/Quad?
>>>
>>> Here the driver is just giving information that the controller support it.
>>> The MTD layer enables dual/quad based on what the flash supports; quad
>>> being the first priority
>>> I understand that the spi core reads rx, tx-bus-width property and
>>> master support flags and
>>> performs the necessary checks.
>>
>> That's correct: as long as the rx, tx-bus-width  properties do not indicate a
>> Dual or Quad wiring, it won't be used.
>>
>> However, based on schematics, someone may set the rx, tx-bus-width properties
>> to 4, which is correct, as DT describes the hardware. But this will fail to
>> work.
>> So I think it's safer not to announce Dual/Quad support in the driver until
>> the actual driver support is there.
>
> OK. Correct me if I'm wrong but announcing this support in master->flags is
> just to say the controller supports it - Like Punnaiah mentioned in the other
> mail, nothing specific needs to be done from the controller driver to enable
> dual/quad support. This is at the SOC/IP level.
> I agree it might or might not be supported at board-level.

IC. So this is not a generic SPI controller, but a controller meant for QSPI
FLASHes? I.e. if you would connect a different device, the controller may
unexpectedly use Dual or Quad mode if it sees a byte fly by that looks like
a Quad SPI FLASH read command?

> But that's based on the user's hardware. Should master->flags
> really take this into consideration?

You mean master->mode_bits?

> BTW, I dint see master->mode_bits being used anywhere at the moment.

It is used to match SPI controller and slave features, cfr. spi_setup() in
drivers/spi/spi.c.

If Dual/Quad is supported, the bits should be set. Else spi_setup() will
clear the bits in the SPI slave's mode field, disabling Dual/Quad transfers.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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  reply	other threads:[~2014-07-10 11:25 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-10  8:50 [RFC PATCH 0/2] Zynq QSPI RFC Harini Katakam
2014-07-10  8:50 ` Harini Katakam
2014-07-10  8:50 ` [RFC PATCH 1/2] spi: Add support for Zynq QSPI controller Harini Katakam
2014-07-10  9:18   ` Geert Uytterhoeven
2014-07-10  9:18     ` Geert Uytterhoeven
2014-07-10  9:31     ` Harini Katakam
2014-07-10  9:31       ` Harini Katakam
2014-07-10  9:42       ` Geert Uytterhoeven
2014-07-10  9:42         ` Geert Uytterhoeven
2014-07-10 10:33         ` Harini Katakam
2014-07-10 10:33           ` Harini Katakam
2014-07-10 11:25           ` Geert Uytterhoeven [this message]
2014-07-10 11:25             ` Geert Uytterhoeven
2014-07-10 11:55             ` Harini Katakam
2014-07-10 11:55               ` Harini Katakam
2014-07-10 12:01           ` Mark Brown
2014-07-10 12:01             ` Mark Brown
2014-07-10 12:39             ` Harini Katakam
2014-07-10 12:39               ` Harini Katakam
     [not found]               ` <20140710150713.GJ30458@sirena.org.uk>
     [not found]                 ` <03CA77BA8AF6F1469AEDFBDA1322A7B748213306@XAP-PVEXMBX01.xlnx.xilinx.com>
2014-07-14  7:22                   ` Harini Katakam
2014-07-14  7:22                     ` Harini Katakam
2014-07-14 18:07                     ` Mark Brown
2014-07-14 18:07                       ` Mark Brown
2014-07-10  9:44       ` Punnaiah Choudary Kalluri
2014-07-10  9:44         ` Punnaiah Choudary Kalluri
2014-07-11 13:38   ` Mark Brown
2014-07-14  7:27     ` Harini Katakam
2014-07-14  7:27       ` Harini Katakam
2014-07-10  8:50 ` [RFC PATCH 2/2] devicetree: Add devicetree bindings documentation for Zynq QSPI Harini Katakam

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