From: Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>
To: David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
Cc: Jej B
<James.Bottomley-JuX6DAaQMKPCXq6kfMZ53/egYHeGw8Jk@public.gmane.org>,
Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>,
"torvalds-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org"
<torvalds-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>,
linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
linux-ia64-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-nvdimm
<linux-nvdimm-y27Ovi1pjclAfugRpC6u6w@public.gmane.org>,
dhowells-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
sparclinux-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
egtvedt-BrfabpQBY5qlHtIdYg32fQ@public.gmane.org,
linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-s390-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
X86 ML <x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
hskinnemoen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-xtensa-PjhNF2WwrV/0Sa2dR60CXw@public.gmane.org,
grundler-6jwH94ZQLHl74goWV3ctuw@public.gmane.org,
realmz6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
linux-metag-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jens Axboe <axboe-tSWWG44O7X1aa/9Udqfwiw@public.gmane.org>,
Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>,
linux-parisc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
vgupta-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-alpha-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxppc-dev
<linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries
Date: Fri, 14 Aug 2015 09:17:45 -0700 [thread overview]
Message-ID: <CAPcyv4idztwrtr5wBQkiTSNT8L3HWf8zk9webheQAmunLD7cBw@mail.gmail.com> (raw)
In-Reply-To: <20150813.211155.1774898831276303437.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
On Thu, Aug 13, 2015 at 9:11 PM, David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org> wrote:
> From: James Bottomley <James.Bottomley-d9PhHud1JfjCXq6kfMZ53/egYHeGw8Jk@public.gmane.org>
>> At least on some PA architectures, you have to be very careful.
>> Improperly managed, multiple aliases will cause the system to crash
>> (actually a machine check in the cache chequerboard). For the most
>> temperamental systems, we need the cache line flushed and the alias
>> mapping ejected from the TLB cache before we access the same page at an
>> inequivalent alias.
>
> Also, I want to mention that on sparc64 we manage the cache aliasing
> state in the page struct.
>
> Until a page is mapped into userspace, we just record the most recent
> cpu to store into that page with kernel side mappings. Once the page
> ends up being mapped or the cpu doing kernel side stores changes, we
> actually perform the cache flush.
>
> Generally speaking, I think that all actual physical memory the kernel
> operates on should have a struct page backing it. So this whole
> discussion of operating on physical memory in scatter lists without
> backing page structs feels really foreign to me.
So the only way for page-less pfns to enter the system is through the
->direct_access() method provided by a pmem device's struct
block_device_operations. Architectures that require struct page for
cache management to must disable ->direct_access() in this case.
If an arch still wants to support pmem+DAX then it needs something
like this patchset (feedback welcome) to map pmem pfns:
https://lkml.org/lkml/2015/8/12/970
Effectively this would disable ->direct_access() on /dev/pmem0, but
permit ->direct_access() on /dev/pmem0m.
WARNING: multiple messages have this Message-ID (diff)
From: Dan Williams <dan.j.williams@intel.com>
To: David Miller <davem@davemloft.net>
Cc: Jej B <James.Bottomley@hansenpartnership.com>,
Christoph Hellwig <hch@lst.de>,
"torvalds@linux-foundation.org" <torvalds@linux-foundation.org>,
linux-mips@linux-mips.org, linux-ia64@vger.kernel.org,
linux-nvdimm <linux-nvdimm@ml01.01.org>,
dhowells@redhat.com, sparclinux@vger.kernel.org,
egtvedt@samfundet.no, linux-arch@vger.kernel.org,
linux-s390@vger.kernel.org, X86 ML <x86@kernel.org>,
David Woodhouse <dwmw2@infradead.org>,
hskinnemoen@gmail.com, linux-xtensa@linux-xtensa.org,
grundler@parisc-linux.org, realmz6@gmail.com,
alex.williamson@redhat.com, linux-metag@vger.kernel.org,
Jens Axboe <axboe@kernel.dk>, Michal Simek <monstr@monstr.eu>,
linux-parisc@vger.kernel.org, vgupta@synopsys.com,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
linux-alpha@vger.kernel.org, linux-media@vger.kernel.org,
linuxppc-dev <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries
Date: Fri, 14 Aug 2015 09:17:45 -0700 [thread overview]
Message-ID: <CAPcyv4idztwrtr5wBQkiTSNT8L3HWf8zk9webheQAmunLD7cBw@mail.gmail.com> (raw)
In-Reply-To: <20150813.211155.1774898831276303437.davem@davemloft.net>
On Thu, Aug 13, 2015 at 9:11 PM, David Miller <davem@davemloft.net> wrote:
> From: James Bottomley <James.Bottomley@HansenPartnership.com>
>> At least on some PA architectures, you have to be very careful.
>> Improperly managed, multiple aliases will cause the system to crash
>> (actually a machine check in the cache chequerboard). For the most
>> temperamental systems, we need the cache line flushed and the alias
>> mapping ejected from the TLB cache before we access the same page at an
>> inequivalent alias.
>
> Also, I want to mention that on sparc64 we manage the cache aliasing
> state in the page struct.
>
> Until a page is mapped into userspace, we just record the most recent
> cpu to store into that page with kernel side mappings. Once the page
> ends up being mapped or the cpu doing kernel side stores changes, we
> actually perform the cache flush.
>
> Generally speaking, I think that all actual physical memory the kernel
> operates on should have a struct page backing it. So this whole
> discussion of operating on physical memory in scatter lists without
> backing page structs feels really foreign to me.
So the only way for page-less pfns to enter the system is through the
->direct_access() method provided by a pmem device's struct
block_device_operations. Architectures that require struct page for
cache management to must disable ->direct_access() in this case.
If an arch still wants to support pmem+DAX then it needs something
like this patchset (feedback welcome) to map pmem pfns:
https://lkml.org/lkml/2015/8/12/970
Effectively this would disable ->direct_access() on /dev/pmem0, but
permit ->direct_access() on /dev/pmem0m.
WARNING: multiple messages have this Message-ID (diff)
From: Dan Williams <dan.j.williams@intel.com>
To: David Miller <davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
Cc: Jej B
<James.Bottomley-JuX6DAaQMKPCXq6kfMZ53/egYHeGw8Jk@public.gmane.org>,
Christoph Hellwig <hch-jcswGhMUV9g@public.gmane.org>,
"torvalds-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org"
<torvalds-de/tnXTf+JLsfHDXvbKv3WD2FQJk+8+b@public.gmane.org>,
linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org,
linux-ia64-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-nvdimm
<linux-nvdimm-y27Ovi1pjclAfugRpC6u6w@public.gmane.org>,
dhowells-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
sparclinux-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
egtvedt-BrfabpQBY5qlHtIdYg32fQ@public.gmane.org,
linux-arch-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-s390-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
X86 ML <x86-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
hskinnemoen-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-xtensa-PjhNF2WwrV/0Sa2dR60CXw@public.gmane.org,
grundler-6jwH94ZQLHl74goWV3ctuw@public.gmane.org,
realmz6-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
alex.williamson-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
linux-metag-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Jens Axboe <axboe-tSWWG44O7X1aa/9Udqfwiw@public.gmane.org>,
Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>,
linux-parisc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
vgupta-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-alpha-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-media-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxppc-dev
<linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>
Subject: Re: [PATCH 29/31] parisc: handle page-less SG entries
Date: Fri, 14 Aug 2015 16:17:45 +0000 [thread overview]
Message-ID: <CAPcyv4idztwrtr5wBQkiTSNT8L3HWf8zk9webheQAmunLD7cBw@mail.gmail.com> (raw)
In-Reply-To: <20150813.211155.1774898831276303437.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
On Thu, Aug 13, 2015 at 9:11 PM, David Miller <davem@davemloft.net> wrote:
> From: James Bottomley <James.Bottomley@HansenPartnership.com>
>> At least on some PA architectures, you have to be very careful.
>> Improperly managed, multiple aliases will cause the system to crash
>> (actually a machine check in the cache chequerboard). For the most
>> temperamental systems, we need the cache line flushed and the alias
>> mapping ejected from the TLB cache before we access the same page at an
>> inequivalent alias.
>
> Also, I want to mention that on sparc64 we manage the cache aliasing
> state in the page struct.
>
> Until a page is mapped into userspace, we just record the most recent
> cpu to store into that page with kernel side mappings. Once the page
> ends up being mapped or the cpu doing kernel side stores changes, we
> actually perform the cache flush.
>
> Generally speaking, I think that all actual physical memory the kernel
> operates on should have a struct page backing it. So this whole
> discussion of operating on physical memory in scatter lists without
> backing page structs feels really foreign to me.
So the only way for page-less pfns to enter the system is through the
->direct_access() method provided by a pmem device's struct
block_device_operations. Architectures that require struct page for
cache management to must disable ->direct_access() in this case.
If an arch still wants to support pmem+DAX then it needs something
like this patchset (feedback welcome) to map pmem pfns:
https://lkml.org/lkml/2015/8/12/970
Effectively this would disable ->direct_access() on /dev/pmem0, but
permit ->direct_access() on /dev/pmem0m.
next prev parent reply other threads:[~2015-08-14 16:17 UTC|newest]
Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-12 7:05 RFC: prepare for struct scatterlist entries without page backing Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 01/31] scatterlist: add sg_pfn and sg_has_page helpers Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 02/31] scatterlist: use sg_phys() Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 03/31] dma-debug: handle page-less SG entries Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 04/31] x86/pci-nommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 05/31] x86/pci-calgary: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 06/31] alpha/pci-noop: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 07/31] alpha/pci_iommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 08/31] c6x: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 09/31] ia64/pci_dma: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 10/31] powerpc/iommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 11/31] sparc/iommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 12/31] mn10300: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 13/31] sparc/ldc: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 14/31] sparc32/io-unit: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-14 12:03 ` Josip Rodin
[not found] ` <1439363150-8661-1-git-send-email-hch-jcswGhMUV9g@public.gmane.org>
2015-08-12 7:05 ` [PATCH 15/31] sparc32/iommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 20/31] avr32: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 9:36 ` Hans-Christian Egtvedt
2015-08-12 9:36 ` Hans-Christian Egtvedt
2015-08-12 12:42 ` RFC: prepare for struct scatterlist entries without page backing Boaz Harrosh
2015-08-12 12:42 ` Boaz Harrosh
2015-08-12 12:42 ` Boaz Harrosh
2015-08-12 23:37 ` Julian Calaby
2015-08-12 23:37 ` Julian Calaby
2015-08-13 14:35 ` Christoph Hellwig
2015-08-13 14:35 ` Christoph Hellwig
2015-08-13 14:35 ` Christoph Hellwig
2015-08-13 23:40 ` Julian Calaby
2015-08-13 23:40 ` Julian Calaby
2015-08-13 23:40 ` Julian Calaby
2015-08-13 14:40 ` Christoph Hellwig
2015-08-13 14:40 ` Christoph Hellwig
2015-08-13 15:42 ` Boaz Harrosh
2015-08-13 15:42 ` Boaz Harrosh
2015-08-12 7:05 ` [PATCH 16/31] s390: handle page-less SG entries Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 11:51 ` Sebastian Ott
2015-08-12 11:51 ` Sebastian Ott
2015-08-12 7:05 ` [PATCH 17/31] ia64/sba_iommu: remove sba_sg_address Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 18/31] nios2: handle page-less SG entries Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 19/31] arc: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 10:28 ` Vineet Gupta
2015-08-12 10:28 ` Vineet Gupta
2015-08-12 10:28 ` Vineet Gupta
2015-08-12 10:28 ` Vineet Gupta
2015-08-12 7:05 ` [PATCH 21/31] blackfin: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 22/31] metag: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 23/31] sh: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 24/31] xtensa: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 25/31] frv: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 26/31] openrisc: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 27/31] mips: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 28/31] powerpc: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 7:05 ` [PATCH 29/31] parisc: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 16:01 ` Linus Torvalds
2015-08-12 16:01 ` Linus Torvalds
2015-08-12 16:01 ` Linus Torvalds
2015-08-12 16:01 ` Linus Torvalds
2015-08-13 14:31 ` Christoph Hellwig
2015-08-13 14:31 ` Christoph Hellwig
2015-08-13 14:31 ` Christoph Hellwig
2015-08-13 14:31 ` Christoph Hellwig
2015-08-14 3:30 ` Dan Williams
2015-08-14 3:30 ` Dan Williams
2015-08-14 3:30 ` Dan Williams
2015-08-14 3:30 ` Dan Williams
2015-08-14 3:59 ` James Bottomley
2015-08-14 3:59 ` James Bottomley
2015-08-14 3:59 ` James Bottomley
2015-08-14 3:59 ` James Bottomley
2015-08-14 4:11 ` David Miller
2015-08-14 4:11 ` David Miller
[not found] ` <20150813.211155.1774898831276303437.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
2015-08-14 16:17 ` Dan Williams [this message]
2015-08-14 16:17 ` Dan Williams
2015-08-14 16:17 ` Dan Williams
2015-08-12 7:05 ` [PATCH 30/31] intel-iommu: " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 9:51 ` David Woodhouse
2015-08-12 9:51 ` David Woodhouse
2015-08-12 9:51 ` David Woodhouse
2015-08-12 7:05 ` [PATCH 31/31] dma-mapping-common: skip kmemleak checks for " Christoph Hellwig
2015-08-12 7:05 ` Christoph Hellwig
2015-08-12 16:05 ` Linus Torvalds
2015-08-12 16:05 ` Linus Torvalds
2015-08-12 16:05 ` Linus Torvalds
2015-08-12 16:05 ` Linus Torvalds
2015-08-13 14:33 ` Christoph Hellwig
2015-08-13 14:33 ` Christoph Hellwig
2015-08-13 14:33 ` Christoph Hellwig
2015-08-13 14:33 ` Christoph Hellwig
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 16:26 ` Catalin Marinas
2015-08-12 17:00 ` RFC: prepare for struct scatterlist entries without page backing James Bottomley
2015-08-12 17:00 ` James Bottomley
2015-08-12 17:00 ` James Bottomley
2015-08-12 17:56 ` Grant Grundler
2015-08-12 17:56 ` Grant Grundler
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