From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "andrew.murray@arm.com" <andrew.murray@arm.com>, "arnd@arndb.de" <arnd@arndb.de>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>, Leo Li <leoyang.li@nxp.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com>, Mingkai Hu <mingkai.hu@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com> Subject: RE: [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Date: Mon, 24 Feb 2020 06:07:03 +0000 [thread overview] Message-ID: <DB8PR04MB67475A29B09B85F9628FFCE084EC0@DB8PR04MB6747.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20200221121956.GC12711@e121166-lin.cambridge.arm.com> Hi Lorenzo, > -----Original Message----- > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Sent: 2020年2月21日 20:20 > To: Z.q. Hou <zhiqiang.hou@nxp.com> > Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > bhelgaas@google.com; robh+dt@kernel.org; andrew.murray@arm.com; > arnd@arndb.de; mark.rutland@arm.com; l.subrahmanya@mobiveil.co.in; > shawnguo@kernel.org; m.karthikeyan@mobiveil.co.in; Leo Li > <leoyang.li@nxp.com>; catalin.marinas@arm.com; will.deacon@arm.com; > Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>; > Xiaowei Bao <xiaowei.bao@nxp.com> > Subject: Re: [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe > Gen4 driver for NXP Layerscape SoCs > > On Thu, Feb 13, 2020 at 12:06:31PM +0800, Zhiqiang Hou wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > > This patch set is to recode the Mobiveil driver and add PCIe support > > for NXP Layerscape series SoCs integrated Mobiveil's PCIe Gen4 > > controller. > > > > Hou Zhiqiang (13): > > PCI: mobiveil: Introduce a new structure mobiveil_root_port > > PCI: mobiveil: Move the host initialization into a function > > PCI: mobiveil: Collect the interrupt related operations into a > > function > > PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver > > PCI: mobiveil: Add callback function for interrupt initialization > > PCI: mobiveil: Add callback function for link up check > > PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host > > PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors > > PCI: mobiveil: Add Header Type field check > > dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller > > PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs > > arm64: dts: lx2160a: Add PCIe controller DT nodes > > arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 > > > > .../bindings/pci/layerscape-pcie-gen4.txt | 52 ++ > > MAINTAINERS | 10 +- > > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 +++++ > > arch/arm64/configs/defconfig | 1 + > > drivers/pci/controller/Kconfig | 11 +- > > drivers/pci/controller/Makefile | 2 +- > > drivers/pci/controller/mobiveil/Kconfig | 33 + > > drivers/pci/controller/mobiveil/Makefile | 5 + > > .../mobiveil/pcie-layerscape-gen4.c | 267 +++++++++ > > .../pcie-mobiveil-host.c} | 564 ++++-------------- > > .../controller/mobiveil/pcie-mobiveil-plat.c | 61 ++ > > .../pci/controller/mobiveil/pcie-mobiveil.c | 230 +++++++ > > .../pci/controller/mobiveil/pcie-mobiveil.h | 226 +++++++ > > 13 files changed, 1170 insertions(+), 455 deletions(-) create mode > > 100644 Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > create mode 100644 drivers/pci/controller/mobiveil/Kconfig > > create mode 100644 drivers/pci/controller/mobiveil/Makefile > > create mode 100644 > > drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c > > rename drivers/pci/controller/{pcie-mobiveil.c => > > mobiveil/pcie-mobiveil-host.c} (54%) create mode 100644 > > drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c > > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c > > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h > > I dropped the last two patches since they must be re-routed via arm-soc > (defconfig update and dts), I tweaked most of commit logs and applied the > series to pci/mobiveil, please check everything is in order. Thanks a lot for your help on the commit logs! Thanks, Zhiqiang > > Thanks, > Lorenzo
WARNING: multiple messages have this Message-ID (diff)
From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, Xiaowei Bao <xiaowei.bao@nxp.com>, "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>, "arnd@arndb.de" <arnd@arndb.de>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "will.deacon@arm.com" <will.deacon@arm.com>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Leo Li <leoyang.li@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, Mingkai Hu <mingkai.hu@nxp.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "bhelgaas@google.com" <bhelgaas@google.com>, "andrew.murray@arm.com" <andrew.murray@arm.com>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: RE: [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Date: Mon, 24 Feb 2020 06:07:03 +0000 [thread overview] Message-ID: <DB8PR04MB67475A29B09B85F9628FFCE084EC0@DB8PR04MB6747.eurprd04.prod.outlook.com> (raw) In-Reply-To: <20200221121956.GC12711@e121166-lin.cambridge.arm.com> Hi Lorenzo, > -----Original Message----- > From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> > Sent: 2020年2月21日 20:20 > To: Z.q. Hou <zhiqiang.hou@nxp.com> > Cc: linux-pci@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; > bhelgaas@google.com; robh+dt@kernel.org; andrew.murray@arm.com; > arnd@arndb.de; mark.rutland@arm.com; l.subrahmanya@mobiveil.co.in; > shawnguo@kernel.org; m.karthikeyan@mobiveil.co.in; Leo Li > <leoyang.li@nxp.com>; catalin.marinas@arm.com; will.deacon@arm.com; > Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>; > Xiaowei Bao <xiaowei.bao@nxp.com> > Subject: Re: [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe > Gen4 driver for NXP Layerscape SoCs > > On Thu, Feb 13, 2020 at 12:06:31PM +0800, Zhiqiang Hou wrote: > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > > This patch set is to recode the Mobiveil driver and add PCIe support > > for NXP Layerscape series SoCs integrated Mobiveil's PCIe Gen4 > > controller. > > > > Hou Zhiqiang (13): > > PCI: mobiveil: Introduce a new structure mobiveil_root_port > > PCI: mobiveil: Move the host initialization into a function > > PCI: mobiveil: Collect the interrupt related operations into a > > function > > PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver > > PCI: mobiveil: Add callback function for interrupt initialization > > PCI: mobiveil: Add callback function for link up check > > PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host > > PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors > > PCI: mobiveil: Add Header Type field check > > dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller > > PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs > > arm64: dts: lx2160a: Add PCIe controller DT nodes > > arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 > > > > .../bindings/pci/layerscape-pcie-gen4.txt | 52 ++ > > MAINTAINERS | 10 +- > > .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 163 +++++ > > arch/arm64/configs/defconfig | 1 + > > drivers/pci/controller/Kconfig | 11 +- > > drivers/pci/controller/Makefile | 2 +- > > drivers/pci/controller/mobiveil/Kconfig | 33 + > > drivers/pci/controller/mobiveil/Makefile | 5 + > > .../mobiveil/pcie-layerscape-gen4.c | 267 +++++++++ > > .../pcie-mobiveil-host.c} | 564 ++++-------------- > > .../controller/mobiveil/pcie-mobiveil-plat.c | 61 ++ > > .../pci/controller/mobiveil/pcie-mobiveil.c | 230 +++++++ > > .../pci/controller/mobiveil/pcie-mobiveil.h | 226 +++++++ > > 13 files changed, 1170 insertions(+), 455 deletions(-) create mode > > 100644 Documentation/devicetree/bindings/pci/layerscape-pcie-gen4.txt > > create mode 100644 drivers/pci/controller/mobiveil/Kconfig > > create mode 100644 drivers/pci/controller/mobiveil/Makefile > > create mode 100644 > > drivers/pci/controller/mobiveil/pcie-layerscape-gen4.c > > rename drivers/pci/controller/{pcie-mobiveil.c => > > mobiveil/pcie-mobiveil-host.c} (54%) create mode 100644 > > drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c > > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c > > create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h > > I dropped the last two patches since they must be re-routed via arm-soc > (defconfig update and dts), I tweaked most of commit logs and applied the > series to pci/mobiveil, please check everything is in order. Thanks a lot for your help on the commit logs! Thanks, Zhiqiang > > Thanks, > Lorenzo _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-02-24 6:07 UTC|newest] Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-02-13 4:06 [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-13 4:06 ` [PATCHv10 01/13] PCI: mobiveil: Introduce a new structure mobiveil_root_port Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:12 ` Andrew Murray 2020-02-20 17:12 ` Andrew Murray 2020-02-24 5:45 ` Z.q. Hou 2020-02-24 5:45 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 02/13] PCI: mobiveil: Move the host initialization into a function Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:19 ` Andrew Murray 2020-02-20 17:19 ` Andrew Murray 2020-02-24 5:48 ` Z.q. Hou 2020-02-24 5:48 ` Z.q. Hou 2020-02-21 12:15 ` Lorenzo Pieralisi 2020-02-21 12:15 ` Lorenzo Pieralisi 2020-02-13 4:06 ` [PATCHv10 03/13] PCI: mobiveil: Collect the interrupt related operations " Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:23 ` Andrew Murray 2020-02-20 17:23 ` Andrew Murray 2020-02-24 5:49 ` Z.q. Hou 2020-02-24 5:49 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 04/13] PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-13 4:06 ` [PATCHv10 05/13] PCI: mobiveil: Add callback function for interrupt initialization Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:25 ` Andrew Murray 2020-02-20 17:25 ` Andrew Murray 2020-02-24 5:49 ` Z.q. Hou 2020-02-24 5:49 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 06/13] PCI: mobiveil: Add callback function for link up check Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-13 4:06 ` [PATCHv10 07/13] PCI: mobiveil: Allow mobiveil_host_init() to be used to re-init host Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:28 ` Andrew Murray 2020-02-20 17:28 ` Andrew Murray 2020-02-24 5:49 ` Z.q. Hou 2020-02-24 5:49 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 08/13] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:29 ` Andrew Murray 2020-02-20 17:29 ` Andrew Murray 2020-02-24 5:50 ` Z.q. Hou 2020-02-24 5:50 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 09/13] PCI: mobiveil: Add Header Type field check Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:31 ` Andrew Murray 2020-02-20 17:31 ` Andrew Murray 2020-02-24 5:50 ` Z.q. Hou 2020-02-24 5:50 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 10/13] dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-13 4:06 ` [PATCHv10 11/13] PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-20 17:43 ` Andrew Murray 2020-02-20 17:43 ` Andrew Murray 2020-02-24 5:50 ` Z.q. Hou 2020-02-24 5:50 ` Z.q. Hou 2020-02-21 12:17 ` Lorenzo Pieralisi 2020-02-21 12:17 ` Lorenzo Pieralisi 2020-02-24 5:58 ` Z.q. Hou 2020-02-24 5:58 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 12/13] arm64: dts: lx2160a: Add PCIe controller DT nodes Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-24 1:28 ` Shawn Guo 2020-02-24 1:28 ` Shawn Guo 2020-02-24 6:11 ` Z.q. Hou 2020-02-24 6:11 ` Z.q. Hou 2020-02-13 4:06 ` [PATCHv10 13/13] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 Zhiqiang Hou 2020-02-13 4:06 ` Zhiqiang Hou 2020-02-24 1:29 ` Shawn Guo 2020-02-24 1:29 ` Shawn Guo 2020-02-21 12:19 ` [PATCHv10 00/13] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Lorenzo Pieralisi 2020-02-21 12:19 ` Lorenzo Pieralisi 2020-02-24 6:07 ` Z.q. Hou [this message] 2020-02-24 6:07 ` Z.q. Hou
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