From: Russell King <rmk+kernel@arm.linux.org.uk> To: linux-rockchip@lists.infradead.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Philipp Zabel <p.zabel@pengutronix.de>, Andy Yan <andy.yan@rock-chips.com>, Yakir Yang <ykk@rock-chips.com>, Fabio Estevam <fabio.estevam@freescale.com>, Sascha Hauer <s.hauer@pengutronix.de>, Jon Nettleton <jon.nettleton@gmail.com> Subject: [PATCH 04/12] gpu: imx: fix support for interlaced modes Date: Sat, 08 Aug 2015 17:03:40 +0100 [thread overview] Message-ID: <E1ZO6ay-0002qh-6E@rmk-PC.arm.linux.org.uk> (raw) In-Reply-To: <20150808160251.GM7557@n2100.arm.linux.org.uk> The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> --- drivers/gpu/ipu-v3/ipu-dc.c | 18 ++++++++--- drivers/gpu/ipu-v3/ipu-di.c | 79 +++++++++++++++++++++------------------------ 2 files changed, 51 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-dc.c b/drivers/gpu/ipu-v3/ipu-dc.c index 9ef2e1f54ca4..aa560855c1dc 100644 --- a/drivers/gpu/ipu-v3/ipu-dc.c +++ b/drivers/gpu/ipu-v3/ipu-dc.c @@ -183,12 +183,22 @@ int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, } if (interlaced) { - dc_link_event(dc, DC_EVT_NL, 0, 3); - dc_link_event(dc, DC_EVT_EOL, 0, 2); - dc_link_event(dc, DC_EVT_NEW_DATA, 0, 1); + int word, addr; + + if (dc->di) { + addr = 1; + word = 1; + } else { + addr = 0; + word = 0; + } + + dc_link_event(dc, DC_EVT_NL, addr, 3); + dc_link_event(dc, DC_EVT_EOL, addr, 2); + dc_link_event(dc, DC_EVT_NEW_DATA, addr, 1); /* Init template microcode */ - dc_write_tmpl(dc, 0, WROD(0), 0, map, SYNC_WAVE, 0, 8, 1); + dc_write_tmpl(dc, word, WROD(0), 0, map, SYNC_WAVE, 0, 6, 1); } else { if (dc->di) { dc_link_event(dc, DC_EVT_NL, 2, 3); diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index a96991c5c15f..359268e3a166 100644 --- a/drivers/gpu/ipu-v3/ipu-di.c +++ b/drivers/gpu/ipu-v3/ipu-di.c @@ -71,6 +71,10 @@ enum di_sync_wave { DI_SYNC_HSYNC = 3, DI_SYNC_VSYNC = 4, DI_SYNC_DE = 6, + + DI_SYNC_CNT1 = 2, /* counter >= 2 only */ + DI_SYNC_CNT4 = 5, /* counter >= 5 only */ + DI_SYNC_CNT5 = 6, /* counter >= 6 only */ }; #define SYNC_WAVE 0 @@ -211,66 +215,59 @@ static void ipu_di_sync_config_interlaced(struct ipu_di *di, sig->mode.hback_porch + sig->mode.hfront_porch; u32 v_total = sig->mode.vactive + sig->mode.vsync_len + sig->mode.vback_porch + sig->mode.vfront_porch; - u32 reg; struct di_sync_config cfg[] = { { - .run_count = h_total / 2 - 1, - .run_src = DI_SYNC_CLK, + /* 1: internal VSYNC for each frame */ + .run_count = v_total * 2 - 1, + .run_src = 3, /* == counter 7 */ }, { - .run_count = h_total - 11, + /* PIN2: HSYNC waveform */ + .run_count = h_total - 1, .run_src = DI_SYNC_CLK, - .cnt_down = 4, + .cnt_polarity_gen_en = 1, + .cnt_polarity_trigger_src = DI_SYNC_CLK, + .cnt_down = sig->mode.hsync_len * 2, }, { - .run_count = v_total * 2 - 1, - .run_src = DI_SYNC_INT_HSYNC, - .offset_count = 1, - .offset_src = DI_SYNC_INT_HSYNC, - .cnt_down = 4, + /* PIN3: VSYNC waveform */ + .run_count = v_total - 1, + .run_src = 4, /* == counter 7 */ + .cnt_polarity_gen_en = 1, + .cnt_polarity_trigger_src = 4, /* == counter 7 */ + .cnt_down = sig->mode.vsync_len * 2, + .cnt_clr_src = DI_SYNC_CNT1, }, { - .run_count = v_total / 2 - 1, + /* 4: Field */ + .run_count = v_total / 2, .run_src = DI_SYNC_HSYNC, - .offset_count = sig->mode.vback_porch, - .offset_src = DI_SYNC_HSYNC, + .offset_count = h_total / 2, + .offset_src = DI_SYNC_CLK, .repeat_count = 2, - .cnt_clr_src = DI_SYNC_VSYNC, + .cnt_clr_src = DI_SYNC_CNT1, }, { + /* 5: Active lines */ .run_src = DI_SYNC_HSYNC, - .repeat_count = sig->mode.vactive / 2, - .cnt_clr_src = 4, - }, { - .run_count = v_total - 1, - .run_src = DI_SYNC_HSYNC, - }, { - .run_count = v_total / 2 - 1, - .run_src = DI_SYNC_HSYNC, - .offset_count = 9, + .offset_count = (sig->mode.vsync_len + + sig->mode.vback_porch) / 2, .offset_src = DI_SYNC_HSYNC, - .repeat_count = 2, - .cnt_clr_src = DI_SYNC_VSYNC, + .repeat_count = sig->mode.vactive / 2, + .cnt_clr_src = DI_SYNC_CNT4, }, { + /* 6: Active pixel, referenced by DC */ .run_src = DI_SYNC_CLK, - .offset_count = sig->mode.hback_porch, + .offset_count = sig->mode.hsync_len + + sig->mode.hback_porch, .offset_src = DI_SYNC_CLK, .repeat_count = sig->mode.hactive, - .cnt_clr_src = 5, + .cnt_clr_src = DI_SYNC_CNT5, }, { - .run_count = v_total - 1, - .run_src = DI_SYNC_INT_HSYNC, - .offset_count = v_total / 2, - .offset_src = DI_SYNC_INT_HSYNC, - .cnt_clr_src = DI_SYNC_HSYNC, - .cnt_down = 4, + /* 7: Half line HSYNC */ + .run_count = h_total / 2 - 1, + .run_src = DI_SYNC_CLK, } }; ipu_di_sync_config(di, cfg, 0, ARRAY_SIZE(cfg)); - /* set gentime select and tag sel */ - reg = ipu_di_read(di, DI_SW_GEN1(9)); - reg &= 0x1FFFFFFF; - reg |= (3 - 1) << 29 | 0x00008000; - ipu_di_write(di, reg, DI_SW_GEN1(9)); - ipu_di_write(di, v_total / 2 - 1, DI_SCR_CONF); } @@ -605,10 +602,8 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) /* set y_sel = 1 */ di_gen |= 0x10000000; - di_gen |= DI_GEN_POLARITY_5; - di_gen |= DI_GEN_POLARITY_8; - vsync_cnt = 7; + vsync_cnt = 3; } else { ipu_di_sync_config_noninterlaced(di, sig, div); -- 2.1.0
WARNING: multiple messages have this Message-ID (diff)
From: rmk+kernel@arm.linux.org.uk (Russell King) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 04/12] gpu: imx: fix support for interlaced modes Date: Sat, 08 Aug 2015 17:03:40 +0100 [thread overview] Message-ID: <E1ZO6ay-0002qh-6E@rmk-PC.arm.linux.org.uk> (raw) In-Reply-To: <20150808160251.GM7557@n2100.arm.linux.org.uk> The support for interlaced video modes seems to be broken; we don't use anything other than the vtotal/htotal from the timing information to define the various sync counters. Freescale patches for interlaced video support contain an alternative sync counter setup, which we include here. This setup produces the hsync and vsync via the normal counter 2 and 3, but moves the display enable signal from counter 5 to counter 6. Therefore, we need to change the display controller setup as well. The corresponding Freescale patches for this change are: iMX6-HDMI-support-interlaced-display-mode.patch IPU-fine-tuning-the-interlace-display-timing-for-CEA.patch This produces a working interlace format output from the IPU. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> --- drivers/gpu/ipu-v3/ipu-dc.c | 18 ++++++++--- drivers/gpu/ipu-v3/ipu-di.c | 79 +++++++++++++++++++++------------------------ 2 files changed, 51 insertions(+), 46 deletions(-) diff --git a/drivers/gpu/ipu-v3/ipu-dc.c b/drivers/gpu/ipu-v3/ipu-dc.c index 9ef2e1f54ca4..aa560855c1dc 100644 --- a/drivers/gpu/ipu-v3/ipu-dc.c +++ b/drivers/gpu/ipu-v3/ipu-dc.c @@ -183,12 +183,22 @@ int ipu_dc_init_sync(struct ipu_dc *dc, struct ipu_di *di, bool interlaced, } if (interlaced) { - dc_link_event(dc, DC_EVT_NL, 0, 3); - dc_link_event(dc, DC_EVT_EOL, 0, 2); - dc_link_event(dc, DC_EVT_NEW_DATA, 0, 1); + int word, addr; + + if (dc->di) { + addr = 1; + word = 1; + } else { + addr = 0; + word = 0; + } + + dc_link_event(dc, DC_EVT_NL, addr, 3); + dc_link_event(dc, DC_EVT_EOL, addr, 2); + dc_link_event(dc, DC_EVT_NEW_DATA, addr, 1); /* Init template microcode */ - dc_write_tmpl(dc, 0, WROD(0), 0, map, SYNC_WAVE, 0, 8, 1); + dc_write_tmpl(dc, word, WROD(0), 0, map, SYNC_WAVE, 0, 6, 1); } else { if (dc->di) { dc_link_event(dc, DC_EVT_NL, 2, 3); diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c index a96991c5c15f..359268e3a166 100644 --- a/drivers/gpu/ipu-v3/ipu-di.c +++ b/drivers/gpu/ipu-v3/ipu-di.c @@ -71,6 +71,10 @@ enum di_sync_wave { DI_SYNC_HSYNC = 3, DI_SYNC_VSYNC = 4, DI_SYNC_DE = 6, + + DI_SYNC_CNT1 = 2, /* counter >= 2 only */ + DI_SYNC_CNT4 = 5, /* counter >= 5 only */ + DI_SYNC_CNT5 = 6, /* counter >= 6 only */ }; #define SYNC_WAVE 0 @@ -211,66 +215,59 @@ static void ipu_di_sync_config_interlaced(struct ipu_di *di, sig->mode.hback_porch + sig->mode.hfront_porch; u32 v_total = sig->mode.vactive + sig->mode.vsync_len + sig->mode.vback_porch + sig->mode.vfront_porch; - u32 reg; struct di_sync_config cfg[] = { { - .run_count = h_total / 2 - 1, - .run_src = DI_SYNC_CLK, + /* 1: internal VSYNC for each frame */ + .run_count = v_total * 2 - 1, + .run_src = 3, /* == counter 7 */ }, { - .run_count = h_total - 11, + /* PIN2: HSYNC waveform */ + .run_count = h_total - 1, .run_src = DI_SYNC_CLK, - .cnt_down = 4, + .cnt_polarity_gen_en = 1, + .cnt_polarity_trigger_src = DI_SYNC_CLK, + .cnt_down = sig->mode.hsync_len * 2, }, { - .run_count = v_total * 2 - 1, - .run_src = DI_SYNC_INT_HSYNC, - .offset_count = 1, - .offset_src = DI_SYNC_INT_HSYNC, - .cnt_down = 4, + /* PIN3: VSYNC waveform */ + .run_count = v_total - 1, + .run_src = 4, /* == counter 7 */ + .cnt_polarity_gen_en = 1, + .cnt_polarity_trigger_src = 4, /* == counter 7 */ + .cnt_down = sig->mode.vsync_len * 2, + .cnt_clr_src = DI_SYNC_CNT1, }, { - .run_count = v_total / 2 - 1, + /* 4: Field */ + .run_count = v_total / 2, .run_src = DI_SYNC_HSYNC, - .offset_count = sig->mode.vback_porch, - .offset_src = DI_SYNC_HSYNC, + .offset_count = h_total / 2, + .offset_src = DI_SYNC_CLK, .repeat_count = 2, - .cnt_clr_src = DI_SYNC_VSYNC, + .cnt_clr_src = DI_SYNC_CNT1, }, { + /* 5: Active lines */ .run_src = DI_SYNC_HSYNC, - .repeat_count = sig->mode.vactive / 2, - .cnt_clr_src = 4, - }, { - .run_count = v_total - 1, - .run_src = DI_SYNC_HSYNC, - }, { - .run_count = v_total / 2 - 1, - .run_src = DI_SYNC_HSYNC, - .offset_count = 9, + .offset_count = (sig->mode.vsync_len + + sig->mode.vback_porch) / 2, .offset_src = DI_SYNC_HSYNC, - .repeat_count = 2, - .cnt_clr_src = DI_SYNC_VSYNC, + .repeat_count = sig->mode.vactive / 2, + .cnt_clr_src = DI_SYNC_CNT4, }, { + /* 6: Active pixel, referenced by DC */ .run_src = DI_SYNC_CLK, - .offset_count = sig->mode.hback_porch, + .offset_count = sig->mode.hsync_len + + sig->mode.hback_porch, .offset_src = DI_SYNC_CLK, .repeat_count = sig->mode.hactive, - .cnt_clr_src = 5, + .cnt_clr_src = DI_SYNC_CNT5, }, { - .run_count = v_total - 1, - .run_src = DI_SYNC_INT_HSYNC, - .offset_count = v_total / 2, - .offset_src = DI_SYNC_INT_HSYNC, - .cnt_clr_src = DI_SYNC_HSYNC, - .cnt_down = 4, + /* 7: Half line HSYNC */ + .run_count = h_total / 2 - 1, + .run_src = DI_SYNC_CLK, } }; ipu_di_sync_config(di, cfg, 0, ARRAY_SIZE(cfg)); - /* set gentime select and tag sel */ - reg = ipu_di_read(di, DI_SW_GEN1(9)); - reg &= 0x1FFFFFFF; - reg |= (3 - 1) << 29 | 0x00008000; - ipu_di_write(di, reg, DI_SW_GEN1(9)); - ipu_di_write(di, v_total / 2 - 1, DI_SCR_CONF); } @@ -605,10 +602,8 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig) /* set y_sel = 1 */ di_gen |= 0x10000000; - di_gen |= DI_GEN_POLARITY_5; - di_gen |= DI_GEN_POLARITY_8; - vsync_cnt = 7; + vsync_cnt = 3; } else { ipu_di_sync_config_noninterlaced(di, sig, div); -- 2.1.0
next prev parent reply other threads:[~2015-08-08 16:03 UTC|newest] Thread overview: 226+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-08-08 16:02 [PATCH 00/12] dw-hdmi development Russell King - ARM Linux 2015-08-08 16:02 ` Russell King - ARM Linux 2015-08-08 16:02 ` Russell King - ARM Linux 2015-08-08 16:03 ` [PATCH 01/12] drm: bridge/dw_hdmi: remove pixel repetition setting for all VICs Russell King 2015-08-08 16:03 ` Russell King 2015-08-08 16:03 ` [PATCH 02/12] drm: bridge/dw_hdmi: don't support any pixel doubled modes Russell King 2015-08-08 16:03 ` Russell King 2015-08-08 16:03 ` [PATCH 03/12] gpu: imx: simplify sync polarity setting Russell King 2015-08-08 16:03 ` Russell King 2015-10-06 17:57 ` Fabio Estevam 2015-10-06 17:57 ` Fabio Estevam 2015-10-06 17:57 ` Fabio Estevam 2015-08-08 16:03 ` Russell King [this message] 2015-08-08 16:03 ` [PATCH 04/12] gpu: imx: fix support for interlaced modes Russell King 2015-08-27 8:39 ` Philipp Zabel 2015-08-27 8:39 ` Philipp Zabel 2015-08-27 8:39 ` Philipp Zabel 2015-08-27 8:54 ` Russell King - ARM Linux 2015-08-27 8:54 ` Russell King - ARM Linux 2015-08-27 8:54 ` Russell King - ARM Linux 2015-08-27 9:40 ` Philipp Zabel 2015-08-27 9:40 ` Philipp Zabel 2015-08-27 9:40 ` Philipp Zabel 2015-10-06 17:59 ` Fabio Estevam 2015-10-06 17:59 ` Fabio Estevam 2015-10-06 17:59 ` Fabio Estevam 2015-08-08 16:03 ` [PATCH 05/12] drm: bridge/dw_hdmi: add support for interlaced video modes Russell King 2015-08-08 16:03 ` Russell King 2015-08-08 16:03 ` Russell King 2015-10-06 18:00 ` Fabio Estevam 2015-10-06 18:00 ` Fabio Estevam 2015-10-06 18:00 ` Fabio Estevam 2015-08-08 16:03 ` [PATCH 06/12] drm: bridge/dw_hdmi: clean up HDMI vs DVI mode handling Russell King 2015-08-08 16:03 ` Russell King 2015-10-07 3:40 ` Yakir Yang 2015-10-07 3:40 ` Yakir Yang 2015-10-07 3:40 ` Yakir Yang 2015-08-08 16:03 ` [PATCH 07/12] drm: bridge/dw_hdmi: enable audio only if sink supports audio Russell King 2015-08-08 16:03 ` Russell King 2015-10-07 3:42 ` Yakir Yang 2015-10-07 3:42 ` Yakir Yang 2015-10-07 3:42 ` Yakir Yang 2015-08-08 16:04 ` [PATCH 08/12] drm: bridge/dw_hdmi: avoid enabling interface in mode_set Russell King 2015-08-08 16:04 ` Russell King 2015-10-07 3:50 ` Yakir Yang 2015-10-07 3:50 ` Yakir Yang 2015-10-07 9:18 ` Russell King - ARM Linux 2015-10-07 9:18 ` Russell King - ARM Linux 2015-10-07 9:18 ` Russell King - ARM Linux 2015-10-07 9:35 ` Yakir Yang 2015-10-07 9:35 ` Yakir Yang 2015-10-07 9:35 ` Yakir Yang 2015-08-08 16:04 ` [PATCH 09/12] drm: bridge/dw_hdmi: rename dw_hdmi_phy_enable_power() Russell King 2015-08-08 16:04 ` Russell King 2015-08-08 16:04 ` Russell King 2015-10-07 4:00 ` Yakir Yang 2015-08-08 16:04 ` [PATCH 10/12] drm: bridge/dw_hdmi: fix phy enable/disable handling Russell King 2015-08-08 16:04 ` Russell King 2015-08-08 16:04 ` Russell King 2015-10-07 4:05 ` Yakir Yang 2015-10-07 9:48 ` Russell King - ARM Linux 2015-10-07 9:48 ` Russell King - ARM Linux 2015-10-07 9:48 ` Russell King - ARM Linux 2015-10-07 10:40 ` Yakir Yang 2015-10-07 19:17 ` Russell King - ARM Linux 2015-10-07 19:17 ` Russell King - ARM Linux 2015-10-07 19:17 ` Russell King - ARM Linux 2015-10-08 8:35 ` Yakir Yang 2015-10-08 8:35 ` Yakir Yang 2015-10-08 8:35 ` Yakir Yang 2015-08-08 16:04 ` [PATCH 11/12] drm: bridge/dw_hdmi: add connector mode forcing Russell King 2015-08-08 16:04 ` Russell King 2015-08-08 16:04 ` Russell King 2015-10-06 18:01 ` Fabio Estevam 2015-10-06 18:01 ` Fabio Estevam 2015-10-06 18:01 ` Fabio Estevam 2015-08-08 16:04 ` [PATCH 12/12] drm: bridge/dw_hdmi: improve HDMI enable/disable handling Russell King 2015-08-08 16:04 ` Russell King 2015-10-06 18:03 ` Fabio Estevam 2015-10-06 18:03 ` Fabio Estevam 2015-10-06 18:03 ` Fabio Estevam 2015-08-08 16:09 ` [PATCH 0/9] dw-hdmi audio support Russell King - ARM Linux 2015-08-08 16:09 ` Russell King - ARM Linux 2015-08-08 16:09 ` Russell King - ARM Linux 2015-08-08 16:10 ` [PATCH 1/9] drm: bridge/dw_hdmi-ahb-audio: add audio driver Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-08-10 10:05 ` Takashi Iwai 2015-08-10 10:05 ` Takashi Iwai 2015-08-10 10:05 ` Takashi Iwai 2015-08-10 10:39 ` Russell King - ARM Linux 2015-08-10 10:39 ` Russell King - ARM Linux 2015-08-10 10:39 ` Russell King - ARM Linux 2015-08-10 12:23 ` Takashi Iwai 2015-08-10 12:23 ` Takashi Iwai 2015-08-10 12:23 ` Takashi Iwai 2015-08-10 16:49 ` Russell King - ARM Linux 2015-08-10 16:49 ` Russell King - ARM Linux 2015-08-10 16:49 ` Russell King - ARM Linux 2015-08-10 18:16 ` Mark Brown 2015-08-10 18:16 ` Mark Brown 2015-08-14 13:54 ` [PATCH v2 1/9] drm: bridge/dw_hdmi-ahb-audio: add audio driver David Airlie <airlied@linux.ie>, Sascha Hauer <s.hauer@pengutronix.de>, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Jaroslav Kysela <perex@perex.cz>, linux-rockchip@lists.infradead.org, Mark Brown <broonie@kernel.org>, Philipp Zabel <p.zabel@pengutronix.de>, Yakir Yang <ykk@rock-chips.com>, Andy Yan <andy.yan@rock-chips.com>, Jon Nettleton <jon.nettleton@gmail.com>, linux-arm-kernel@lists.infradead.org Russell King 2015-08-14 13:54 ` Russell King 2015-08-14 13:54 ` Russell King 2015-08-14 14:04 ` [PATCH v2 1/9] drm: bridge/dw_hdmi-ahb-audio: add audio driver Russell King 2015-08-14 14:04 ` Russell King 2015-08-14 14:04 ` Russell King 2015-08-14 14:34 ` [alsa-devel] " Takashi Iwai 2015-08-14 14:34 ` Takashi Iwai 2015-08-14 14:34 ` Takashi Iwai 2015-10-06 18:07 ` [PATCH " Fabio Estevam 2015-10-06 18:07 ` Fabio Estevam 2015-10-06 18:07 ` Fabio Estevam 2015-10-06 18:18 ` Russell King - ARM Linux 2015-10-06 18:18 ` Russell King - ARM Linux 2015-10-06 18:18 ` Russell King - ARM Linux 2015-10-06 18:45 ` Fabio Estevam 2015-10-06 18:45 ` Fabio Estevam 2015-10-06 18:45 ` Fabio Estevam 2015-10-06 18:54 ` Russell King - ARM Linux 2015-10-06 18:54 ` Russell King - ARM Linux 2015-10-06 18:54 ` Russell King - ARM Linux 2015-10-06 20:25 ` Fabio Estevam 2015-10-06 20:25 ` Fabio Estevam 2015-10-06 20:25 ` Fabio Estevam 2015-10-09 16:00 ` Russell King - ARM Linux 2015-10-09 16:00 ` Russell King - ARM Linux 2015-10-09 16:00 ` Russell King - ARM Linux 2015-10-09 16:02 ` Fabio Estevam 2015-10-09 16:02 ` Fabio Estevam 2015-10-09 16:02 ` Fabio Estevam 2015-10-09 16:11 ` Russell King - ARM Linux 2015-10-09 16:11 ` Russell King - ARM Linux 2015-10-09 16:11 ` Russell King - ARM Linux 2015-08-08 16:10 ` [PATCH 2/9] drm: bridge/dw_hdmi-ahb-audio: parse ELD from HDMI driver Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` [PATCH 3/9] drm: bridge/dw_hdmi-ahb-audio: basic support for multi-channel PCM audio Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` [PATCH 4/9] drm: bridge/dw_hdmi-ahb-audio: allow larger buffer sizes Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` [PATCH 5/9] drm: bridge/dw_hdmi: avoid being recursive in N calculation Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-09-04 17:50 ` Doug Anderson 2015-09-04 17:50 ` Doug Anderson 2015-09-04 17:50 ` Doug Anderson 2015-08-08 16:10 ` [PATCH 6/9] drm: bridge/dw_hdmi: adjust pixel clock values " Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-09-04 18:21 ` Doug Anderson 2015-09-04 18:21 ` Doug Anderson 2015-09-04 18:21 ` Doug Anderson 2015-09-04 19:48 ` Doug Anderson 2015-09-04 19:48 ` Doug Anderson 2015-09-04 19:48 ` Doug Anderson 2015-09-04 21:24 ` Russell King - ARM Linux 2015-09-04 21:24 ` Russell King - ARM Linux 2015-09-04 21:24 ` Russell King - ARM Linux 2015-09-04 23:50 ` Doug Anderson 2015-09-04 23:50 ` Doug Anderson 2015-09-04 23:50 ` Doug Anderson 2015-09-05 0:27 ` Russell King - ARM Linux 2015-09-05 0:27 ` Russell King - ARM Linux 2015-09-05 0:27 ` Russell King - ARM Linux 2015-09-05 2:03 ` Doug Anderson 2015-09-05 2:03 ` Doug Anderson 2015-09-05 2:03 ` Doug Anderson 2015-09-05 8:31 ` Russell King - ARM Linux 2015-09-05 8:31 ` Russell King - ARM Linux 2015-09-05 8:31 ` Russell King - ARM Linux 2015-09-05 13:46 ` Doug Anderson 2015-09-05 13:46 ` Doug Anderson 2015-09-05 13:46 ` Doug Anderson 2015-09-05 14:01 ` Russell King - ARM Linux 2015-09-05 14:01 ` Russell King - ARM Linux 2015-09-05 14:01 ` Russell King - ARM Linux 2015-09-05 19:44 ` Doug Anderson 2015-09-05 19:44 ` Doug Anderson 2015-09-05 19:44 ` Doug Anderson 2015-09-05 8:34 ` Russell King - ARM Linux 2015-09-05 8:34 ` Russell King - ARM Linux 2015-09-05 8:34 ` Russell King - ARM Linux 2015-09-05 13:50 ` Doug Anderson 2015-09-05 13:50 ` Doug Anderson 2015-09-05 13:50 ` Doug Anderson 2015-08-08 16:10 ` [PATCH 7/9] drm: bridge/dw_hdmi: remove ratio support from ACR code Russell King 2015-08-08 16:10 ` Russell King 2015-08-08 16:10 ` Russell King 2015-09-04 18:24 ` Doug Anderson 2015-09-04 18:24 ` Doug Anderson 2015-09-04 18:24 ` Doug Anderson 2015-08-08 16:10 ` [PATCH 8/9] drm: bridge/dw_hdmi: replace CTS calculation for the ACR Russell King 2015-08-08 16:10 ` Russell King 2015-09-04 20:00 ` Doug Anderson 2015-09-04 20:00 ` Doug Anderson 2015-09-04 20:00 ` Doug Anderson 2015-08-08 16:10 ` [PATCH 9/9] drm: bridge/dw_hdmi-i2s-audio: add audio driver Russell King 2015-08-08 16:10 ` Russell King 2015-08-10 15:48 ` Russell King - ARM Linux 2015-08-10 15:48 ` Russell King - ARM Linux 2015-08-10 15:48 ` Russell King - ARM Linux 2015-08-10 16:26 ` Yakir Yang 2015-08-10 16:26 ` Yakir Yang 2015-08-10 16:26 ` Yakir Yang 2015-08-27 8:42 ` [PATCH 0/9] dw-hdmi audio support Philipp Zabel 2015-08-27 8:42 ` Philipp Zabel 2015-08-27 8:42 ` Philipp Zabel 2016-01-05 15:40 ` [alsa-devel] " Jean-Michel Hautbois 2016-01-05 15:40 ` Jean-Michel Hautbois 2016-01-05 15:54 ` Fabio Estevam 2016-01-05 15:54 ` Fabio Estevam 2016-01-05 15:54 ` Fabio Estevam 2016-01-05 16:04 ` Russell King - ARM Linux 2016-01-05 16:04 ` Russell King - ARM Linux 2016-01-05 16:04 ` Russell King - ARM Linux 2016-01-07 8:21 ` Jean-Michel Hautbois 2016-01-07 8:21 ` Jean-Michel Hautbois 2016-01-07 8:21 ` Jean-Michel Hautbois 2015-08-10 12:21 ` [PATCH 00/12] dw-hdmi development Thierry Reding 2015-08-10 12:21 ` Thierry Reding 2015-08-10 12:21 ` Thierry Reding 2015-08-18 10:37 ` Russell King - ARM Linux 2015-08-18 10:37 ` Russell King - ARM Linux 2015-08-18 10:37 ` Russell King - ARM Linux
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