From: Leonard Crestez <leonard.crestez@nxp.com> To: Rob Herring <robh@kernel.org>, Andrey Smirnov <andrew.smirnov@gmail.com>, Lucas Stach <l.stach@pengutronix.de> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Bjorn Helgaas <bhelgaas@google.com>, Fabio Estevam <fabio.estevam@nxp.com>, Chris Healy <cphealy@gmail.com>, Aisheng Dong <aisheng.dong@nxp.com>, Richard Zhu <hongxing.zhu@nxp.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, dl-linux-imx <linux-imx@nxp.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org> Subject: Re: [PATCH v3 3/3] PCI: imx6: Add support for i.MX8MQ Date: Tue, 18 Dec 2018 18:09:02 +0000 [thread overview] Message-ID: <VI1PR04MB5533533242C036C5CF6352BAEEBD0@VI1PR04MB5533.eurprd04.prod.outlook.com> (raw) In-Reply-To: 20181218151533.GA2922@bogus On 12/18/2018 5:15 PM, Rob Herring wrote: > On Mon, Dec 17, 2018 at 08:07:02PM -0800, Andrey Smirnov wrote: >> Add code needed to support i.MX8MQ variant. >> >> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> >> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> >> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt >> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt >> >> +Additional required properties for imx8mq-pcie: >> +- fsl,controller-id: Logical ID of a given PCIE controller. PCIE1 is 0, PCIE2 is 1; >> + > > Remove this. > > If GPR register offset is what you need, then put that into DT. > Typically, we'd have a property with iomuxc phandle and offset. This series initially added explicit offsets but I suggested a single "controller-id" because: * There are multiple bit and byte offsets * Other imx8 SOCs also have 2x pcie with other bit/byte offsets Hiding this behind a compatible string and single "controller-id" seem preferable to elaborating register maps in dt bindings. It also makes upgrades simpler: if features are added which use other bits there is no need to describe them in DT and deal with compatibility headaches. Link to older thread: https://lkml.org/lkml/2018/11/29/888 It's possible my suggestion was misguided.
WARNING: multiple messages have this Message-ID (diff)
From: Leonard Crestez <leonard.crestez@nxp.com> To: Rob Herring <robh@kernel.org>, Andrey Smirnov <andrew.smirnov@gmail.com>, Lucas Stach <l.stach@pengutronix.de> Cc: Aisheng Dong <aisheng.dong@nxp.com>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Richard Zhu <hongxing.zhu@nxp.com>, "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, Fabio Estevam <fabio.estevam@nxp.com>, dl-linux-imx <linux-imx@nxp.com>, Bjorn Helgaas <bhelgaas@google.com>, Chris Healy <cphealy@gmail.com>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v3 3/3] PCI: imx6: Add support for i.MX8MQ Date: Tue, 18 Dec 2018 18:09:02 +0000 [thread overview] Message-ID: <VI1PR04MB5533533242C036C5CF6352BAEEBD0@VI1PR04MB5533.eurprd04.prod.outlook.com> (raw) In-Reply-To: 20181218151533.GA2922@bogus On 12/18/2018 5:15 PM, Rob Herring wrote: > On Mon, Dec 17, 2018 at 08:07:02PM -0800, Andrey Smirnov wrote: >> Add code needed to support i.MX8MQ variant. >> >> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> >> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> >> --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt >> +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt >> >> +Additional required properties for imx8mq-pcie: >> +- fsl,controller-id: Logical ID of a given PCIE controller. PCIE1 is 0, PCIE2 is 1; >> + > > Remove this. > > If GPR register offset is what you need, then put that into DT. > Typically, we'd have a property with iomuxc phandle and offset. This series initially added explicit offsets but I suggested a single "controller-id" because: * There are multiple bit and byte offsets * Other imx8 SOCs also have 2x pcie with other bit/byte offsets Hiding this behind a compatible string and single "controller-id" seem preferable to elaborating register maps in dt bindings. It also makes upgrades simpler: if features are added which use other bits there is no need to describe them in DT and deal with compatibility headaches. Link to older thread: https://lkml.org/lkml/2018/11/29/888 It's possible my suggestion was misguided. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2018-12-18 18:09 UTC|newest] Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-12-18 4:06 [PATCH v3 0/3] PCIE support for i.MX8MQ Andrey Smirnov 2018-12-18 4:06 ` Andrey Smirnov 2018-12-18 4:07 ` [PATCH v3 1/3] PCI: imx6: introduce drvdata Andrey Smirnov 2018-12-18 4:07 ` Andrey Smirnov 2018-12-18 4:07 ` [PATCH v3 2/3] PCI: imx6: Mark PHY functions as i.MX6 specific Andrey Smirnov 2018-12-18 4:07 ` Andrey Smirnov 2018-12-18 4:07 ` [PATCH v3 3/3] PCI: imx6: Add support for i.MX8MQ Andrey Smirnov 2018-12-18 4:07 ` Andrey Smirnov 2018-12-18 9:34 ` Leonard Crestez 2018-12-18 9:34 ` Leonard Crestez 2018-12-18 9:34 ` Leonard Crestez 2018-12-18 18:14 ` Andrey Smirnov 2018-12-18 18:14 ` Andrey Smirnov 2018-12-18 18:14 ` Andrey Smirnov 2018-12-18 15:15 ` Rob Herring 2018-12-18 15:15 ` Rob Herring 2018-12-18 18:09 ` Leonard Crestez [this message] 2018-12-18 18:09 ` Leonard Crestez 2018-12-18 18:09 ` Leonard Crestez 2018-12-18 21:10 ` Rob Herring 2018-12-18 21:10 ` Rob Herring 2018-12-18 21:10 ` Rob Herring 2018-12-20 0:47 ` Andrey Smirnov 2018-12-20 0:47 ` Andrey Smirnov 2018-12-20 0:47 ` Andrey Smirnov 2018-12-20 1:22 ` Trent Piepho 2018-12-20 1:22 ` Trent Piepho 2018-12-20 1:22 ` Trent Piepho 2018-12-20 13:49 ` Leonard Crestez 2018-12-20 13:49 ` Leonard Crestez 2018-12-20 13:49 ` Leonard Crestez 2018-12-20 15:00 ` Rob Herring 2018-12-20 15:00 ` Rob Herring 2018-12-20 15:00 ` Rob Herring 2018-12-20 15:04 ` Rob Herring 2018-12-20 15:04 ` Rob Herring 2018-12-20 15:04 ` Rob Herring
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