Re: [PATCH] drm/mgag200: Fix PLL setup for G200_SE_A rev >=4

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Jocelyn Falempe <jfalempe@redhat.com>,
	dri-devel@lists.freedesktop.org, airlied@redhat.com,
	michel@daenzer.net, stable@vger.kernel.org
Subject: Re: [PATCH] drm/mgag200: Fix PLL setup for G200_SE_A rev >=4
Date: Thu, 13 Oct 2022 13:36:30 +0300	[thread overview]
Message-ID: <Y0fqLofkA7O4IEbQ@intel.com> (raw)
In-Reply-To: <db634341-da68-e8a6-1143-445f17262c63@suse.de>

On Thu, Oct 13, 2022 at 11:05:19AM +0200, Thomas Zimmermann wrote:
> Hi
> 
> Am 13.10.22 um 10:29 schrieb Jocelyn Falempe:
> > For G200_SE_A, PLL M setting is wrong, which leads to blank screen,
> > or "signal out of range" on VGA display.
> > previous code had "m |= 0x80" which was changed to
> > m |= ((pixpllcn & BIT(8)) >> 1);
> > 
> > Tested on G200_SE_A rev 42
> > 
> > This line of code was moved to another file with
> > commit 85397f6bc4ff ("drm/mgag200: Initialize each model in separate
> > function") but can be easily backported before this commit.
> > 
> > Fixes: 2dd040946ecf ("drm/mgag200: Store values (not bits) in struct mgag200_pll_values")
> > Cc: stable@vger.kernel.org
> > Signed-off-by: Jocelyn Falempe <jfalempe@redhat.com>
> > ---
> >   drivers/gpu/drm/mgag200/mgag200_g200se.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/mgag200/mgag200_g200se.c b/drivers/gpu/drm/mgag200/mgag200_g200se.c
> > index be389ed91cbd..4ec035029b8b 100644
> > --- a/drivers/gpu/drm/mgag200/mgag200_g200se.c
> > +++ b/drivers/gpu/drm/mgag200/mgag200_g200se.c
> > @@ -284,7 +284,7 @@ static void mgag200_g200se_04_pixpllc_atomic_update(struct drm_crtc *crtc,
> >   	pixpllcp = pixpllc->p - 1;
> >   	pixpllcs = pixpllc->s;
> >   
> > -	xpixpllcm = pixpllcm | ((pixpllcn & BIT(8)) >> 1);
> > +	xpixpllcm = pixpllcm | BIT(7);
> 
> Thanks for figuring this out. G200SE apparently is special compared to 
> the other models. The old MGA docs only list this bit as <reserved>. 
> Really makes me wonder why this is different.

Could measure eg. the vblank interval with and without that bit set
and see what effect it has. Assuming the PLL locks without the bit
of course.

-- 
Ville Syrjälä
Intel