From: Vinod Koul <vkoul@kernel.org>
To: Swapnil Jakhade <sjakhade@cadence.com>
Cc: kishon@ti.com, robh+dt@kernel.org, p.zabel@pengutronix.de,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, mparab@cadence.com,
a-govindraju@ti.com
Subject: Re: [PATCH v4 00/15] PHY: Add support for multilink configurations in Cadence Sierra PHY driver
Date: Mon, 27 Dec 2021 16:37:56 +0530 [thread overview]
Message-ID: <YcmejF/Xs+RfnTQC@matsya> (raw)
In-Reply-To: <20211223060137.9252-1-sjakhade@cadence.com>
On 23-12-21, 07:01, Swapnil Jakhade wrote:
> Cadence Sierra PHY is a multiprotocol PHY supporting different multilink
> PHY configurations. This patch series extends functionality of Sierra PHY
> driver by adding features like support for multilink multiprotocol
> configurations, derived reference clock etc.
>
> The changes have been validated on TI J721E platform.
Applied, thanks
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: Vinod Koul <vkoul@kernel.org>
To: Swapnil Jakhade <sjakhade@cadence.com>
Cc: kishon@ti.com, robh+dt@kernel.org, p.zabel@pengutronix.de,
linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, mparab@cadence.com,
a-govindraju@ti.com
Subject: Re: [PATCH v4 00/15] PHY: Add support for multilink configurations in Cadence Sierra PHY driver
Date: Mon, 27 Dec 2021 16:37:56 +0530 [thread overview]
Message-ID: <YcmejF/Xs+RfnTQC@matsya> (raw)
In-Reply-To: <20211223060137.9252-1-sjakhade@cadence.com>
On 23-12-21, 07:01, Swapnil Jakhade wrote:
> Cadence Sierra PHY is a multiprotocol PHY supporting different multilink
> PHY configurations. This patch series extends functionality of Sierra PHY
> driver by adding features like support for multilink multiprotocol
> configurations, derived reference clock etc.
>
> The changes have been validated on TI J721E platform.
Applied, thanks
--
~Vinod
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-12-27 11:08 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-23 6:01 [PATCH v4 00/15] PHY: Add support for multilink configurations in Cadence Sierra PHY driver Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 01/15] phy: cadence: Sierra: Use of_device_get_match_data() to get driver data Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 02/15] phy: cadence: Sierra: Prepare driver to add support for multilink configurations Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 03/15] dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic names Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 04/15] dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 05/15] phy: cadence: Sierra: Add support to get SSC type from device tree Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 06/15] phy: cadence: Sierra: Rename some regmap variables to be in sync with Sierra documentation Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 07/15] phy: cadence: Sierra: Add PHY PCS common register configurations Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 08/15] phy: cadence: Sierra: Check cmn_ready assertion during PHY power on Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 09/15] phy: cadence: Sierra: Check PIPE mode PHY status to be ready for operation Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 10/15] phy: cadence: Sierra: Update single link PCIe register configuration Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 11/15] phy: cadence: Sierra: Fix to get correct parent for mux clocks Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 12/15] phy: cadence: Sierra: Add support for PHY multilink configurations Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 13/15] phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 14/15] dt-bindings: phy: cadence-sierra: Add clock ID for derived reference clock Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-23 6:01 ` [PATCH v4 15/15] phy: cadence: Sierra: Add support for derived reference clock output Swapnil Jakhade
2021-12-23 6:01 ` Swapnil Jakhade
2021-12-27 11:07 ` Vinod Koul [this message]
2021-12-27 11:07 ` [PATCH v4 00/15] PHY: Add support for multilink configurations in Cadence Sierra PHY driver Vinod Koul
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