From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: Guo Ren <guoren@kernel.org>
Cc: Jisheng Zhang <jszhang@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Thomas Gleixner <tglx@linutronix.de>,
Steven Rostedt <rostedt@goodmis.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/5] riscv: add lazy preempt support
Date: Mon, 5 Sep 2022 10:46:41 +0200 [thread overview]
Message-ID: <YxW3cZEhEideZon2@linutronix.de> (raw)
In-Reply-To: <CAJF2gTR=Cmcox5JrX2bB12MdmurY3vexSA6vw1cdXXbCNB8tXw@mail.gmail.com>
On 2022-09-05 16:33:54 [+0800], Guo Ren wrote:
> > There is "generic" code in the PREEMPT_RT patch doing that. The counter
> > is incremented/ decremented via preempt_lazy_enable()/disable() and one
> > of the user is migrate_disable()/enable().
> > Basically if a task is task_is_realtime() then NEED_RESCHED is set for
> > the wakeup. For the remaining states (SCHED_OTHER, …) NEED_RESCHED_LAZY
> > is set for the wakeup. This can be delayed if the task is in a "preempt
> > disable lazy" section (similar to a preempt_disable() section) but a
> > task_is_realtime() can still be scheduled if needed.
> Okay, It should be [PATCH RT]. RISC-V would also move to GENERIC_ENTRY
> [1], so above assembly code would be replaced by generic one, right?
correct.
Sebastian
WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
To: Guo Ren <guoren@kernel.org>
Cc: Jisheng Zhang <jszhang@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Anup Patel <anup@brainfault.org>,
Atish Patra <atishp@atishpatra.org>,
Thomas Gleixner <tglx@linutronix.de>,
Steven Rostedt <rostedt@goodmis.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v2 4/5] riscv: add lazy preempt support
Date: Mon, 5 Sep 2022 10:46:41 +0200 [thread overview]
Message-ID: <YxW3cZEhEideZon2@linutronix.de> (raw)
In-Reply-To: <CAJF2gTR=Cmcox5JrX2bB12MdmurY3vexSA6vw1cdXXbCNB8tXw@mail.gmail.com>
On 2022-09-05 16:33:54 [+0800], Guo Ren wrote:
> > There is "generic" code in the PREEMPT_RT patch doing that. The counter
> > is incremented/ decremented via preempt_lazy_enable()/disable() and one
> > of the user is migrate_disable()/enable().
> > Basically if a task is task_is_realtime() then NEED_RESCHED is set for
> > the wakeup. For the remaining states (SCHED_OTHER, …) NEED_RESCHED_LAZY
> > is set for the wakeup. This can be delayed if the task is in a "preempt
> > disable lazy" section (similar to a preempt_disable() section) but a
> > task_is_realtime() can still be scheduled if needed.
> Okay, It should be [PATCH RT]. RISC-V would also move to GENERIC_ENTRY
> [1], so above assembly code would be replaced by generic one, right?
correct.
Sebastian
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next prev parent reply other threads:[~2022-09-05 8:46 UTC|newest]
Thread overview: 42+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-31 17:59 [PATCH v2 0/5] riscv: add PREEMPT_RT support Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-08-31 17:59 ` [PATCH v2 1/5] RISC-V: KVM: Record number of signal exits as a vCPU stat Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-08-31 17:59 ` [PATCH v2 2/5] RISC-V: KVM: Use generic guest entry infrastructure Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-08-31 17:59 ` [PATCH v2 3/5] riscv: select HAVE_POSIX_CPU_TIMERS_TASK_WORK Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-08-31 17:59 ` [PATCH v2 4/5] riscv: add lazy preempt support Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-09-04 15:16 ` Guo Ren
2022-09-04 15:16 ` Guo Ren
2022-09-05 6:34 ` Sebastian Andrzej Siewior
2022-09-05 6:34 ` Sebastian Andrzej Siewior
2022-09-05 8:33 ` Guo Ren
2022-09-05 8:33 ` Guo Ren
2022-09-05 8:46 ` Sebastian Andrzej Siewior [this message]
2022-09-05 8:46 ` Sebastian Andrzej Siewior
2022-09-06 1:46 ` Guo Ren
2022-09-06 1:46 ` Guo Ren
2022-09-05 12:58 ` Jisheng Zhang
2022-09-05 12:58 ` Jisheng Zhang
2022-08-31 17:59 ` [PATCH v2 5/5] riscv: Allow to enable RT Jisheng Zhang
2022-08-31 17:59 ` Jisheng Zhang
2022-09-01 7:04 ` [PATCH v2 0/5] riscv: add PREEMPT_RT support Sebastian Andrzej Siewior
2022-09-01 7:04 ` Sebastian Andrzej Siewior
2022-09-01 13:44 ` Jisheng Zhang
2022-09-01 13:44 ` Jisheng Zhang
2022-09-01 16:41 ` Conor.Dooley
2022-09-01 16:41 ` Conor.Dooley
2022-09-02 13:09 ` Jisheng Zhang
2022-09-02 13:09 ` Jisheng Zhang
2022-09-02 13:29 ` Conor.Dooley
2022-09-02 13:29 ` Conor.Dooley
2022-11-11 14:32 ` Sebastian Andrzej Siewior
2022-11-11 14:32 ` Sebastian Andrzej Siewior
2022-11-11 14:34 ` Conor.Dooley
2022-11-11 14:34 ` Conor.Dooley
2022-11-12 21:40 ` Conor.Dooley
2022-11-12 21:40 ` Conor.Dooley
2023-03-14 13:07 ` Schaffner, Tobias
2023-03-14 13:07 ` Schaffner, Tobias
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