From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <anup.patel@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Atish Patra <atish.patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Anup Patel <anup@brainfault.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 4/6] clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Date: Mon, 01 Jun 2020 10:46:00 +0100 [thread overview]
Message-ID: <a20434e7c380e77e8323c11cff863f0c@kernel.org> (raw)
In-Reply-To: <20200601091543.943678-5-anup.patel@wdc.com>
On 2020-06-01 10:15, Anup Patel wrote:
> Instead of directly calling RISC-V timer interrupt handler from
> RISC-V local interrupt conntroller driver, this patch implements
> RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs
> of Linux IRQ subsystem.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/irq.h | 2 --
> drivers/clocksource/timer-riscv.c | 43 ++++++++++++++++++++++++++++---
> drivers/irqchip/irq-riscv-intc.c | 8 ------
> 3 files changed, 40 insertions(+), 13 deletions(-)
Reviewed-by: Marc Zyngier <maz@kernel.org>
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Anup Patel <anup.patel@wdc.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>,
Jason Cooper <jason@lakedaemon.net>,
Anup Patel <anup@brainfault.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
linux-kernel@vger.kernel.org, Atish Patra <atish.patra@wdc.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Thomas Gleixner <tglx@linutronix.de>,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH v7 4/6] clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Date: Mon, 01 Jun 2020 10:46:00 +0100 [thread overview]
Message-ID: <a20434e7c380e77e8323c11cff863f0c@kernel.org> (raw)
In-Reply-To: <20200601091543.943678-5-anup.patel@wdc.com>
On 2020-06-01 10:15, Anup Patel wrote:
> Instead of directly calling RISC-V timer interrupt handler from
> RISC-V local interrupt conntroller driver, this patch implements
> RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs
> of Linux IRQ subsystem.
>
> Signed-off-by: Anup Patel <anup.patel@wdc.com>
> Reviewed-by: Atish Patra <atish.patra@wdc.com>
> ---
> arch/riscv/include/asm/irq.h | 2 --
> drivers/clocksource/timer-riscv.c | 43 ++++++++++++++++++++++++++++---
> drivers/irqchip/irq-riscv-intc.c | 8 ------
> 3 files changed, 40 insertions(+), 13 deletions(-)
Reviewed-by: Marc Zyngier <maz@kernel.org>
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2020-06-01 9:46 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-01 9:15 [PATCH v7 0/6] New RISC-V Local Interrupt Controller Driver Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:15 ` [PATCH v7 1/6] RISC-V: self-contained IPI handling routine Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:15 ` [PATCH v7 2/6] RISC-V: Rename and move plic_find_hart_id() to arch directory Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:15 ` [PATCH v7 3/6] irqchip: RISC-V per-HART local interrupt controller driver Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:45 ` Marc Zyngier
2020-06-01 9:45 ` Marc Zyngier
2020-06-01 20:19 ` Atish Patra
2020-06-01 20:19 ` Atish Patra
2020-06-02 5:33 ` Anup Patel
2020-06-02 5:33 ` Anup Patel
2020-06-01 9:15 ` [PATCH v7 4/6] clocksource/drivers/timer-riscv: Use per-CPU timer interrupt Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:46 ` Marc Zyngier [this message]
2020-06-01 9:46 ` Marc Zyngier
2020-06-01 9:15 ` [PATCH v7 5/6] RISC-V: Remove do_IRQ() function Anup Patel
2020-06-01 9:15 ` Anup Patel
2020-06-01 9:15 ` [PATCH v7 6/6] RISC-V: Force select RISCV_INTC for CONFIG_RISCV Anup Patel
2020-06-01 9:15 ` Anup Patel
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