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From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski+dt@linaro.org>, <damien.lemoal@opensource.wdc.com>
Cc: <daniel.lezcano@linaro.org>, <Eugeniy.Paltsev@synopsys.com>,
	<sam@ravnborg.org>, <daniel@ffwll.ch>, <paul.walmsley@sifive.com>,
	<vkoul@kernel.org>, <palmer@rivosinc.com>, <airlied@linux.ie>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<robh+dt@kernel.org>, <masahiroy@kernel.org>,
	<geert@linux-m68k.org>, <niklas.cassel@wdc.com>,
	<dillon.minfei@gmail.com>, <dri-devel@lists.freedesktop.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dmaengine@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<fancer.lancer@gmail.com>, <thierry.reding@gmail.com>,
	<mail@conchuod.ie>
Subject: Re: [PATCH v5 04/13] dt-bindings: memory-controllers: add canaan k210 sram controller
Date: Sun, 10 Jul 2022 19:39:24 +0000	[thread overview]
Message-ID: <a516943f-3dac-70a0-3ebd-9f53fd307f25@microchip.com> (raw)
In-Reply-To: <20220705215213.1802496-5-mail@conchuod.ie>

Damien, Krzysztof,

I know this particular version has not been posted for all that
long, but this binding is (functionally) unchanged for a few
versions now. Are you happy with this approach Damien?
U-Boot only cares about the compatible & the clocks property,
not the regs etc.

I (lazily) tested it in U-Boot with the following diff:

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 3cc8379133..314db88340 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -82,11 +82,14 @@
 
        sram: memory@80000000 {
                device_type = "memory";
+               reg = <0x80000000 0x400000>, /* sram0 4 MiB */
+                     <0x80400000 0x200000>, /* sram1 2 MiB */
+                     <0x80600000 0x200000>; /* aisram 2 MiB */
+               u-boot,dm-pre-reloc;
+       };
+
+       sram_controller: memory-controller {
                compatible = "canaan,k210-sram";
-               reg = <0x80000000 0x400000>,
-                     <0x80400000 0x200000>,
-                     <0x80600000 0x200000>;
-               reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
                         <&sysclk K210_CLK_AI>;

If so, could you queue this for 5.20 please Krzysztof, unless
you've got concerns about it?

Thanks,
Conor.

On 05/07/2022 22:52, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The k210 U-Boot port has been using the clocks defined in the
> devicetree to bring up the board's SRAM, but this violates the
> dt-schema. As such, move the clocks to a dedicated node with
> the same compatible string & document it.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../memory-controllers/canaan,k210-sram.yaml  | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> new file mode 100644
> index 000000000000..f81fb866e319
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Canaan K210 SRAM memory controller
> +
> +description:
> +  The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
> +  of SRAM. The controller is initialised by the bootloader, which configures
> +  its clocks, before OS bringup.
> +
> +maintainers:
> +  - Conor Dooley <conor@kernel.org>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - canaan,k210-sram
> +
> +  clocks:
> +    minItems: 1
> +    items:
> +      - description: sram0 clock
> +      - description: sram1 clock
> +      - description: aisram clock
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: sram0
> +      - const: sram1
> +      - const: aisram
> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/k210-clk.h>
> +    memory-controller {
> +        compatible = "canaan,k210-sram";
> +        clocks = <&sysclk K210_CLK_SRAM0>,
> +                 <&sysclk K210_CLK_SRAM1>,
> +                 <&sysclk K210_CLK_AI>;
> +        clock-names = "sram0", "sram1", "aisram";
> +    };
> --
> 2.37.0
> 


WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski+dt@linaro.org>, <damien.lemoal@opensource.wdc.com>
Cc: <daniel.lezcano@linaro.org>, <Eugeniy.Paltsev@synopsys.com>,
	<sam@ravnborg.org>, <daniel@ffwll.ch>, <paul.walmsley@sifive.com>,
	<vkoul@kernel.org>, <palmer@rivosinc.com>, <airlied@linux.ie>,
	<palmer@dabbelt.com>, <aou@eecs.berkeley.edu>,
	<robh+dt@kernel.org>, <masahiroy@kernel.org>,
	<geert@linux-m68k.org>, <niklas.cassel@wdc.com>,
	<dillon.minfei@gmail.com>, <dri-devel@lists.freedesktop.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dmaengine@vger.kernel.org>, <linux-riscv@lists.infradead.org>,
	<fancer.lancer@gmail.com>, <thierry.reding@gmail.com>,
	<mail@conchuod.ie>
Subject: Re: [PATCH v5 04/13] dt-bindings: memory-controllers: add canaan k210 sram controller
Date: Sun, 10 Jul 2022 19:39:24 +0000	[thread overview]
Message-ID: <a516943f-3dac-70a0-3ebd-9f53fd307f25@microchip.com> (raw)
In-Reply-To: <20220705215213.1802496-5-mail@conchuod.ie>

Damien, Krzysztof,

I know this particular version has not been posted for all that
long, but this binding is (functionally) unchanged for a few
versions now. Are you happy with this approach Damien?
U-Boot only cares about the compatible & the clocks property,
not the regs etc.

I (lazily) tested it in U-Boot with the following diff:

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 3cc8379133..314db88340 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -82,11 +82,14 @@
 
        sram: memory@80000000 {
                device_type = "memory";
+               reg = <0x80000000 0x400000>, /* sram0 4 MiB */
+                     <0x80400000 0x200000>, /* sram1 2 MiB */
+                     <0x80600000 0x200000>; /* aisram 2 MiB */
+               u-boot,dm-pre-reloc;
+       };
+
+       sram_controller: memory-controller {
                compatible = "canaan,k210-sram";
-               reg = <0x80000000 0x400000>,
-                     <0x80400000 0x200000>,
-                     <0x80600000 0x200000>;
-               reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
                         <&sysclk K210_CLK_AI>;

If so, could you queue this for 5.20 please Krzysztof, unless
you've got concerns about it?

Thanks,
Conor.

On 05/07/2022 22:52, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The k210 U-Boot port has been using the clocks defined in the
> devicetree to bring up the board's SRAM, but this violates the
> dt-schema. As such, move the clocks to a dedicated node with
> the same compatible string & document it.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../memory-controllers/canaan,k210-sram.yaml  | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> new file mode 100644
> index 000000000000..f81fb866e319
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Canaan K210 SRAM memory controller
> +
> +description:
> +  The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
> +  of SRAM. The controller is initialised by the bootloader, which configures
> +  its clocks, before OS bringup.
> +
> +maintainers:
> +  - Conor Dooley <conor@kernel.org>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - canaan,k210-sram
> +
> +  clocks:
> +    minItems: 1
> +    items:
> +      - description: sram0 clock
> +      - description: sram1 clock
> +      - description: aisram clock
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: sram0
> +      - const: sram1
> +      - const: aisram
> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/k210-clk.h>
> +    memory-controller {
> +        compatible = "canaan,k210-sram";
> +        clocks = <&sysclk K210_CLK_SRAM0>,
> +                 <&sysclk K210_CLK_SRAM1>,
> +                 <&sysclk K210_CLK_AI>;
> +        clock-names = "sram0", "sram1", "aisram";
> +    };
> --
> 2.37.0
> 

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: <Conor.Dooley@microchip.com>
To: <krzysztof.kozlowski+dt@linaro.org>, <damien.lemoal@opensource.wdc.com>
Cc: niklas.cassel@wdc.com, airlied@linux.ie, palmer@rivosinc.com,
	thierry.reding@gmail.com, linux-riscv@lists.infradead.org,
	sam@ravnborg.org, masahiroy@kernel.org,
	daniel.lezcano@linaro.org, geert@linux-m68k.org,
	Eugeniy.Paltsev@synopsys.com, devicetree@vger.kernel.org,
	aou@eecs.berkeley.edu, robh+dt@kernel.org,
	dri-devel@lists.freedesktop.org, paul.walmsley@sifive.com,
	mail@conchuod.ie, dillon.minfei@gmail.com,
	linux-kernel@vger.kernel.org, fancer.lancer@gmail.com,
	vkoul@kernel.org, palmer@dabbelt.com, dmaengine@vger.kernel.org
Subject: Re: [PATCH v5 04/13] dt-bindings: memory-controllers: add canaan k210 sram controller
Date: Sun, 10 Jul 2022 19:39:24 +0000	[thread overview]
Message-ID: <a516943f-3dac-70a0-3ebd-9f53fd307f25@microchip.com> (raw)
In-Reply-To: <20220705215213.1802496-5-mail@conchuod.ie>

Damien, Krzysztof,

I know this particular version has not been posted for all that
long, but this binding is (functionally) unchanged for a few
versions now. Are you happy with this approach Damien?
U-Boot only cares about the compatible & the clocks property,
not the regs etc.

I (lazily) tested it in U-Boot with the following diff:

diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
index 3cc8379133..314db88340 100644
--- a/arch/riscv/dts/k210.dtsi
+++ b/arch/riscv/dts/k210.dtsi
@@ -82,11 +82,14 @@
 
        sram: memory@80000000 {
                device_type = "memory";
+               reg = <0x80000000 0x400000>, /* sram0 4 MiB */
+                     <0x80400000 0x200000>, /* sram1 2 MiB */
+                     <0x80600000 0x200000>; /* aisram 2 MiB */
+               u-boot,dm-pre-reloc;
+       };
+
+       sram_controller: memory-controller {
                compatible = "canaan,k210-sram";
-               reg = <0x80000000 0x400000>,
-                     <0x80400000 0x200000>,
-                     <0x80600000 0x200000>;
-               reg-names = "sram0", "sram1", "aisram";
                clocks = <&sysclk K210_CLK_SRAM0>,
                         <&sysclk K210_CLK_SRAM1>,
                         <&sysclk K210_CLK_AI>;

If so, could you queue this for 5.20 please Krzysztof, unless
you've got concerns about it?

Thanks,
Conor.

On 05/07/2022 22:52, Conor Dooley wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> The k210 U-Boot port has been using the clocks defined in the
> devicetree to bring up the board's SRAM, but this violates the
> dt-schema. As such, move the clocks to a dedicated node with
> the same compatible string & document it.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  .../memory-controllers/canaan,k210-sram.yaml  | 52 +++++++++++++++++++
>  1 file changed, 52 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> 
> diff --git a/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> new file mode 100644
> index 000000000000..f81fb866e319
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/memory-controllers/canaan,k210-sram.yaml
> @@ -0,0 +1,52 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/memory-controllers/canaan,k210-sram.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Canaan K210 SRAM memory controller
> +
> +description:
> +  The Canaan K210 SRAM memory controller is responsible for the system's 8 MiB
> +  of SRAM. The controller is initialised by the bootloader, which configures
> +  its clocks, before OS bringup.
> +
> +maintainers:
> +  - Conor Dooley <conor@kernel.org>
> +
> +properties:
> +  compatible:
> +    enum:
> +      - canaan,k210-sram
> +
> +  clocks:
> +    minItems: 1
> +    items:
> +      - description: sram0 clock
> +      - description: sram1 clock
> +      - description: aisram clock
> +
> +  clock-names:
> +    minItems: 1
> +    items:
> +      - const: sram0
> +      - const: sram1
> +      - const: aisram
> +
> +required:
> +  - compatible
> +  - clocks
> +  - clock-names
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/k210-clk.h>
> +    memory-controller {
> +        compatible = "canaan,k210-sram";
> +        clocks = <&sysclk K210_CLK_SRAM0>,
> +                 <&sysclk K210_CLK_SRAM1>,
> +                 <&sysclk K210_CLK_AI>;
> +        clock-names = "sram0", "sram1", "aisram";
> +    };
> --
> 2.37.0
> 


  parent reply	other threads:[~2022-07-10 19:39 UTC|newest]

Thread overview: 108+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-07-05 21:52 [PATCH v5 00/13] Canaan devicetree fixes Conor Dooley
2022-07-05 21:52 ` Conor Dooley
2022-07-05 21:52 ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 01/13] dt-bindings: display: convert ilitek,ili9341.txt to dt-schema Conor Dooley
2022-07-05 21:52   ` [PATCH v5 01/13] dt-bindings: display: convert ilitek, ili9341.txt " Conor Dooley
2022-07-05 21:52   ` [PATCH v5 01/13] dt-bindings: display: convert ilitek,ili9341.txt " Conor Dooley
2022-07-05 21:52 ` [PATCH v5 02/13] dt-bindings: display: ili9341: document canaan kd233's lcd Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-12  7:56   ` Conor.Dooley
2022-07-12  7:56     ` Conor.Dooley
2022-07-12  7:56     ` Conor.Dooley
2022-07-05 21:52 ` [PATCH v5 03/13] dt-bindings: dma: dw-axi-dmac: extend the number of interrupts Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-06  5:45   ` Vinod Koul
2022-07-06  5:45     ` Vinod Koul
2022-07-06  5:45     ` Vinod Koul
2022-07-18 15:12   ` Ben Dooks
2022-07-18 15:12     ` Ben Dooks
2022-07-18 15:12     ` Ben Dooks
2022-07-18 15:23     ` Conor.Dooley
2022-07-18 15:23       ` Conor.Dooley
2022-07-18 15:23       ` Conor.Dooley
2022-07-05 21:52 ` [PATCH v5 04/13] dt-bindings: memory-controllers: add canaan k210 sram controller Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-06 14:48   ` Rob Herring
2022-07-06 14:48     ` Rob Herring
2022-07-06 14:48     ` Rob Herring
2022-07-10 19:39   ` Conor.Dooley [this message]
2022-07-10 19:39     ` Conor.Dooley
2022-07-10 19:39     ` Conor.Dooley
2022-07-10 23:21     ` Damien Le Moal
2022-07-10 23:21       ` Damien Le Moal
2022-07-10 23:21       ` Damien Le Moal
2022-07-12 15:54       ` Conor.Dooley
2022-07-12 15:54         ` Conor.Dooley
2022-07-12 15:54         ` Conor.Dooley
2022-07-12 15:59         ` Krzysztof Kozlowski
2022-07-12 15:59           ` Krzysztof Kozlowski
2022-07-12 15:59           ` Krzysztof Kozlowski
2022-07-12 16:04           ` Conor.Dooley
2022-07-12 16:04             ` Conor.Dooley
2022-07-12 16:04             ` Conor.Dooley
2022-08-16  9:27   ` Krzysztof Kozlowski
2022-08-16  9:27     ` Krzysztof Kozlowski
2022-08-16  9:27     ` Krzysztof Kozlowski
2022-08-16  9:31     ` Conor.Dooley
2022-08-16  9:31       ` Conor.Dooley
2022-08-16  9:31       ` Conor.Dooley
2022-07-05 21:52 ` [PATCH v5 05/13] riscv: dts: canaan: fix the k210's memory node Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 06/13] riscv: dts: canaan: fix the k210's timer nodes Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 07/13] riscv: dts: canaan: fix mmc node names Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 08/13] riscv: dts: canaan: fix kd233 display spi frequency Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 09/13] riscv: dts: canaan: use custom compatible for k210 i2s Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 10/13] riscv: dts: canaan: remove spi-max-frequency from controllers Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 11/13] riscv: dts: canaan: fix bus {ranges,reg} warnings Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 12/13] riscv: dts: canaan: add specific compatible for kd233's LCD Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52 ` [PATCH v5 13/13] riscv: dts: canaan: build all devicetress if SOC_CANAAN Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-05 21:52   ` Conor Dooley
2022-07-06  8:03 ` [PATCH v5 00/13] Canaan devicetree fixes Geert Uytterhoeven
2022-07-06  8:03   ` Geert Uytterhoeven
2022-07-06  8:03   ` Geert Uytterhoeven
2022-07-06  8:21   ` Conor.Dooley
2022-07-06  8:21     ` Conor.Dooley
2022-07-06  8:21     ` Conor.Dooley
2022-07-06 11:55   ` Damien Le Moal
2022-07-06 11:55     ` Damien Le Moal
2022-07-06 11:55     ` Damien Le Moal
2022-07-06 12:01     ` Conor.Dooley
2022-07-06 12:01       ` Conor.Dooley
2022-07-06 12:01       ` Conor.Dooley
2022-07-06  8:09 ` Geert Uytterhoeven
2022-07-06  8:09   ` Geert Uytterhoeven
2022-07-06  8:09   ` Geert Uytterhoeven
2022-07-14 22:04 ` Palmer Dabbelt
2022-07-14 22:04   ` Palmer Dabbelt
2022-07-14 22:04   ` Palmer Dabbelt
2022-07-14 22:11   ` Conor.Dooley
2022-07-14 22:11     ` Conor.Dooley
2022-07-14 22:11     ` Conor.Dooley
2022-08-05 17:51     ` Conor.Dooley
2022-08-05 17:51       ` Conor.Dooley
2022-08-05 17:51       ` Conor.Dooley
2022-08-10 22:01       ` Palmer Dabbelt
2022-08-10 22:01         ` Palmer Dabbelt
2022-08-10 22:01         ` Palmer Dabbelt
2022-08-11  6:26         ` Conor.Dooley
2022-08-11  6:26           ` Conor.Dooley
2022-08-11  6:26           ` Conor.Dooley

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