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From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-actions@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 07/13] arm: dts: owl-s500: Add pinctrl & GPIO support
Date: Tue, 29 Dec 2020 23:17:22 +0200	[thread overview]
Message-ID: <a9e9d67a430cc900508dc86831962b282e5edd1e.1609263738.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1609263738.git.cristian.ciocaltea@gmail.com>

Add pinctrl node for Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v3:
 - Added Reviewed-by from Mani

 arch/arm/boot/dts/owl-s500.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 449e9807c4ec..b16172615db0 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -6,6 +6,7 @@
  */
 
 #include <dt-bindings/clock/actions,s500-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/owl-s500-powergate.h>
 #include <dt-bindings/reset/actions,s500-reset.h>
@@ -208,6 +209,25 @@ sps: power-controller@b01b0100 {
 			#power-domain-cells = <1>;
 		};
 
+		pinctrl: pinctrl@b01b0000 {
+			compatible = "actions,s500-pinctrl";
+			reg = <0xb01b0000 0x40>, /* GPIO */
+			      <0xb01b0040 0x10>, /* Multiplexing Control */
+			      <0xb01b0060 0x18>, /* PAD Control */
+			      <0xb01b0080 0xc>;  /* PAD Drive Capacity */
+			clocks = <&cmu CLK_GPIO>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl 0 0 132>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
+				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
+				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
+		};
+
 		dma: dma-controller@b0260000 {
 			compatible = "actions,s500-dma";
 			reg = <0xb0260000 0xd00>;
-- 
2.30.0


WARNING: multiple messages have this Message-ID (diff)
From: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
To: "Rob Herring" <robh+dt@kernel.org>,
	"Andreas Färber" <afaerber@suse.de>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>
Cc: devicetree@vger.kernel.org, linux-actions@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 07/13] arm: dts: owl-s500: Add pinctrl & GPIO support
Date: Tue, 29 Dec 2020 23:17:22 +0200	[thread overview]
Message-ID: <a9e9d67a430cc900508dc86831962b282e5edd1e.1609263738.git.cristian.ciocaltea@gmail.com> (raw)
In-Reply-To: <cover.1609263738.git.cristian.ciocaltea@gmail.com>

Add pinctrl node for Actions Semi S500 SoC.

Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Changes in v3:
 - Added Reviewed-by from Mani

 arch/arm/boot/dts/owl-s500.dtsi | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm/boot/dts/owl-s500.dtsi b/arch/arm/boot/dts/owl-s500.dtsi
index 449e9807c4ec..b16172615db0 100644
--- a/arch/arm/boot/dts/owl-s500.dtsi
+++ b/arch/arm/boot/dts/owl-s500.dtsi
@@ -6,6 +6,7 @@
  */
 
 #include <dt-bindings/clock/actions,s500-cmu.h>
+#include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/owl-s500-powergate.h>
 #include <dt-bindings/reset/actions,s500-reset.h>
@@ -208,6 +209,25 @@ sps: power-controller@b01b0100 {
 			#power-domain-cells = <1>;
 		};
 
+		pinctrl: pinctrl@b01b0000 {
+			compatible = "actions,s500-pinctrl";
+			reg = <0xb01b0000 0x40>, /* GPIO */
+			      <0xb01b0040 0x10>, /* Multiplexing Control */
+			      <0xb01b0060 0x18>, /* PAD Control */
+			      <0xb01b0080 0xc>;  /* PAD Drive Capacity */
+			clocks = <&cmu CLK_GPIO>;
+			gpio-controller;
+			gpio-ranges = <&pinctrl 0 0 132>;
+			#gpio-cells = <2>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, /* GPIOA */
+				     <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, /* GPIOB */
+				     <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, /* GPIOC */
+				     <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, /* GPIOD */
+				     <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; /* GPIOE */
+		};
+
 		dma: dma-controller@b0260000 {
 			compatible = "actions,s500-dma";
 			reg = <0xb0260000 0xd00>;
-- 
2.30.0


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  parent reply	other threads:[~2020-12-29 21:19 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-29 21:17 [PATCH v3 00/13] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi Cristian Ciocaltea
2020-12-29 21:17 ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 01/13] arm: dts: owl-s500: Add Clock Management Unit Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:38   ` Matheus Castello
2021-01-09 16:32     ` Cristian Ciocaltea
2021-01-09 16:32       ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 02/13] arm: dts: owl-s500: Set CMU clocks for UARTs Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:39   ` Matheus Castello
2020-12-29 21:17 ` [PATCH v3 03/13] arm: dts: owl-s500: Add Reset controller Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:40   ` Matheus Castello
2020-12-29 21:17 ` [PATCH v3 04/13] dt-bindings: dma: owl: Add compatible string for Actions Semi S500 SoC Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-06  6:22   ` Vinod Koul
2021-01-06  6:22     ` Vinod Koul
2020-12-29 21:17 ` [PATCH v3 05/13] dmaengine: owl: Add compatible for the Actions Semi S500 DMA controller Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-06  6:22   ` Vinod Koul
2021-01-06  6:22     ` Vinod Koul
2020-12-29 21:17 ` [PATCH v3 06/13] arm: dts: owl-s500: Add " Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:40   ` Matheus Castello
2020-12-29 21:17 ` Cristian Ciocaltea [this message]
2020-12-29 21:17   ` [PATCH v3 07/13] arm: dts: owl-s500: Add pinctrl & GPIO support Cristian Ciocaltea
2021-01-09  3:40   ` Matheus Castello
2020-12-29 21:17 ` [PATCH v3 08/13] arm: dts: owl-s500: Add MMC support Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:41   ` Matheus Castello
2020-12-29 21:17 ` [PATCH v3 09/13] arm: dts: owl-s500: Add I2C support Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 10/13] arm: dts: owl-s500: Add SIRQ controller Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2021-01-09  3:41   ` Matheus Castello
2020-12-29 21:17 ` [PATCH v3 11/13] arm: dts: owl-s500-roseapplepi: Add uSD support Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2020-12-31  7:27   ` Manivannan Sadhasivam
2020-12-31  7:27     ` Manivannan Sadhasivam
2020-12-31  9:05     ` Cristian Ciocaltea
2020-12-31  9:05       ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 12/13] arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration Cristian Ciocaltea
2020-12-29 21:17   ` Cristian Ciocaltea
2020-12-29 21:17 ` [PATCH v3 13/13] MAINTAINERS: Add linux-actions ML for Actions Semi Arch Cristian Ciocaltea
2020-12-31  7:54 ` [PATCH v3 00/13] Add CMU/RMU/DMA/MMC/I2C support for Actions Semi Manivannan Sadhasivam
2020-12-31  7:54   ` Manivannan Sadhasivam
2020-12-31  9:12   ` Cristian Ciocaltea
2020-12-31  9:12     ` Cristian Ciocaltea
2020-12-31 17:12     ` Manivannan Sadhasivam
2020-12-31 17:12       ` Manivannan Sadhasivam

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