[Qemu-devel] LSI53C895A: Implement Scratch Byte Register

[Qemu-devel] LSI53C895A: Implement Scratch Byte Register

[Sebastian Herbszt]

Qemu exits with

lsi_scsi: error: Unhandled writeb 0x3a = 0x0
lsi_scsi: error: readb 0x3a

when trying to use LSI option rom 8xx_64.rom.

- Sebastian

--- qemu-r6125/hw/lsi53c895a.c.orig Tue Dec 23 17:53:51 2008
+++ qemu-r6125/hw/lsi53c895a.c Tue Dec 23 17:57:31 2008
@@ -261,6 +261,7 @@ typedef struct {
     uint32_t sbc;
     uint32_t csbc;
     uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
+    uint8_t sbr;
 
     /* Script ram is stored as 32-bit words in host byteorder.  */
     uint32_t script_ram[2048];
@@ -329,6 +330,7 @@ static void lsi_soft_reset(LSIState *s)
     s->ia = 0;
     s->sbc = 0;
     s->csbc = 0;
+    s->sbr = 0;
 }
 
 static int lsi_dma_40bit(LSIState *s)
@@ -1404,6 +1406,8 @@ static uint8_t lsi_reg_readb(LSIState *s
         return s->dmode;
     case 0x39: /* DIEN */
         return s->dien;
+    case 0x3a: /* SBR */
+        return s->sbr;
     case 0x3b: /* DCNTL */
         return s->dcntl;
     case 0x40: /* SIEN0 */
@@ -1616,6 +1620,9 @@ static void lsi_reg_writeb(LSIState *s, 
     case 0x39: /* DIEN */
         s->dien = val;
         lsi_update_irq(s);
+        break;
+    case 0x3a: /* SBR */
+        s->sbr = val;
         break;
     case 0x3b: /* DCNTL */
         s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD);

Re: [Qemu-devel] LSI53C895A: Implement Scratch Byte Register

[Anthony Liguori]

On Tue, Dec 23, 2008 at 1:34 PM, Sebastian Herbszt <herbszt@gmx.de> wrote:
> Qemu exits with
>
> lsi_scsi: error: Unhandled writeb 0x3a = 0x0
> lsi_scsi: error: readb 0x3a
>
> when trying to use LSI option rom 8xx_64.rom.

Is this enough to get the LSI option rom working?

Regards,

Anthony Liguori

> - Sebastian
>
> --- qemu-r6125/hw/lsi53c895a.c.orig Tue Dec 23 17:53:51 2008
> +++ qemu-r6125/hw/lsi53c895a.c Tue Dec 23 17:57:31 2008
> @@ -261,6 +261,7 @@ typedef struct {
>    uint32_t sbc;
>    uint32_t csbc;
>    uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */
> +    uint8_t sbr;
>
>    /* Script ram is stored as 32-bit words in host byteorder.  */
>    uint32_t script_ram[2048];
> @@ -329,6 +330,7 @@ static void lsi_soft_reset(LSIState *s)
>    s->ia = 0;
>    s->sbc = 0;
>    s->csbc = 0;
> +    s->sbr = 0;
> }
>
> static int lsi_dma_40bit(LSIState *s)
> @@ -1404,6 +1406,8 @@ static uint8_t lsi_reg_readb(LSIState *s
>        return s->dmode;
>    case 0x39: /* DIEN */
>        return s->dien;
> +    case 0x3a: /* SBR */
> +        return s->sbr;
>    case 0x3b: /* DCNTL */
>        return s->dcntl;
>    case 0x40: /* SIEN0 */
> @@ -1616,6 +1620,9 @@ static void lsi_reg_writeb(LSIState *s,    case 0x39:
> /* DIEN */
>        s->dien = val;
>        lsi_update_irq(s);
> +        break;
> +    case 0x3a: /* SBR */
> +        s->sbr = val;
>        break;
>    case 0x3b: /* DCNTL */
>        s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD);
>
>
>
>

[Qemu-devel] Re: LSI53C895A: Implement Scratch Byte Register

[Sebastian Herbszt]

Anthony Liguori wrote:
> On Tue, Dec 23, 2008 at 1:34 PM, Sebastian Herbszt <herbszt@gmx.de> wrote:
>> Qemu exits with
>>
>> lsi_scsi: error: Unhandled writeb 0x3a = 0x0
>> lsi_scsi: error: readb 0x3a
>>
>> when trying to use LSI option rom 8xx_64.rom.
> 
> Is this enough to get the LSI option rom working?

Unfortunately not. There are more lsi_scsi errors. DDIM bios support seems to be
needed too.

- Sebastian