From: "Jongsung Kim" <neidhard.kim@lge.com>
To: "'Stephen Warren'" <swarren@wwwdotorg.org>
Cc: "'Russell King'" <linux@arm.linux.org.uk>,
"'Greg Kroah-Hartman'" <gregkh@linuxfoundation.org>,
<jslaby@suse.cz>, <linux-serial@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-rpi-kernel@lists.infradead.org>,
<linux-arm-kernel@lists.infradead.org>
Subject: RE: [PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5
Date: Tue, 14 May 2013 16:15:39 +0900 [thread overview]
Message-ID: <01fd01ce5072$d6b9fcd0$842df670$@lge.com> (raw)
In-Reply-To: <5191D200.3040604@wwwdotorg.org>
Stephen Warren <swarren@wwwdotorg.org> :
> For reference, the AMBA periphid of the UART device there is 0x00341011.
> The nibble "3" is the revision being tested in:
The UART device has periphid 0x00341011, and is compatible with the
original PL011 prior to r1p5. Not with r1p5. It could be a possible
way to specify the compatible periphid (such as 0x00241011) instead
of just 0x0 when initializing the amba_device for the UART.
> > +static unsigned int get_fifosize_arm(unsigned int periphid)
> > +{
> > + unsigned int rev = (periphid >> 20) & 0xf;
> > + return rev < 3 ? 16 : 32;
> > +}
>
> Should that be <= not <, or is there just something more wrong in the
> patch or bcm2835 HW? I wonder how r1p5 maps to 3 in the test above.
>From the PL011-r1p5 TRM, bits[7:4] of the UARTPeriphID2 register are
read as:
r1p0 - 0x0
r1p1 - 0x1
r1p3 - 0x2
r1p4 - 0x2
r1p5 - 0x3.
Doesn't the BCM2835 UART have anything different from the ARM PL011?
What about the UARTPCellID registers? They are set to 0xb105f00d with
the ARM PL011.
WARNING: multiple messages have this Message-ID (diff)
From: "Jongsung Kim" <neidhard.kim@lge.com>
To: 'Stephen Warren' <swarren@wwwdotorg.org>
Cc: 'Russell King' <linux@arm.linux.org.uk>,
'Greg Kroah-Hartman' <gregkh@linuxfoundation.org>,
jslaby@suse.cz, linux-serial@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-rpi-kernel@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: RE: [PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5
Date: Tue, 14 May 2013 16:15:39 +0900 [thread overview]
Message-ID: <01fd01ce5072$d6b9fcd0$842df670$@lge.com> (raw)
In-Reply-To: <5191D200.3040604@wwwdotorg.org>
Stephen Warren <swarren@wwwdotorg.org> :
> For reference, the AMBA periphid of the UART device there is 0x00341011.
> The nibble "3" is the revision being tested in:
The UART device has periphid 0x00341011, and is compatible with the
original PL011 prior to r1p5. Not with r1p5. It could be a possible
way to specify the compatible periphid (such as 0x00241011) instead
of just 0x0 when initializing the amba_device for the UART.
> > +static unsigned int get_fifosize_arm(unsigned int periphid)
> > +{
> > + unsigned int rev = (periphid >> 20) & 0xf;
> > + return rev < 3 ? 16 : 32;
> > +}
>
> Should that be <= not <, or is there just something more wrong in the
> patch or bcm2835 HW? I wonder how r1p5 maps to 3 in the test above.
>From the PL011-r1p5 TRM, bits[7:4] of the UARTPeriphID2 register are
read as:
r1p0 - 0x0
r1p1 - 0x1
r1p3 - 0x2
r1p4 - 0x2
r1p5 - 0x3.
Doesn't the BCM2835 UART have anything different from the ARM PL011?
What about the UARTPCellID registers? They are set to 0xb105f00d with
the ARM PL011.
WARNING: multiple messages have this Message-ID (diff)
From: neidhard.kim@lge.com (Jongsung Kim)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5
Date: Tue, 14 May 2013 16:15:39 +0900 [thread overview]
Message-ID: <01fd01ce5072$d6b9fcd0$842df670$@lge.com> (raw)
In-Reply-To: <5191D200.3040604@wwwdotorg.org>
Stephen Warren <swarren@wwwdotorg.org> :
> For reference, the AMBA periphid of the UART device there is 0x00341011.
> The nibble "3" is the revision being tested in:
The UART device has periphid 0x00341011, and is compatible with the
original PL011 prior to r1p5. Not with r1p5. It could be a possible
way to specify the compatible periphid (such as 0x00241011) instead
of just 0x0 when initializing the amba_device for the UART.
> > +static unsigned int get_fifosize_arm(unsigned int periphid)
> > +{
> > + unsigned int rev = (periphid >> 20) & 0xf;
> > + return rev < 3 ? 16 : 32;
> > +}
>
> Should that be <= not <, or is there just something more wrong in the
> patch or bcm2835 HW? I wonder how r1p5 maps to 3 in the test above.
>From the PL011-r1p5 TRM, bits[7:4] of the UARTPeriphID2 register are
read as:
r1p0 - 0x0
r1p1 - 0x1
r1p3 - 0x2
r1p4 - 0x2
r1p5 - 0x3.
Doesn't the BCM2835 UART have anything different from the ARM PL011?
What about the UARTPCellID registers? They are set to 0xb105f00d with
the ARM PL011.
next prev parent reply other threads:[~2013-05-14 7:15 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-12 9:18 [PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5 Jongsung Kim
2013-04-12 9:18 ` Jongsung Kim
2013-04-19 12:58 ` Russell King - ARM Linux
2013-05-14 5:56 ` Stephen Warren
2013-05-14 5:56 ` Stephen Warren
2013-05-14 5:56 ` Stephen Warren
2013-05-14 7:15 ` Jongsung Kim [this message]
2013-05-14 7:15 ` Jongsung Kim
2013-05-14 7:15 ` Jongsung Kim
2013-05-14 21:03 ` Stephen Warren
2013-05-14 21:03 ` Stephen Warren
2013-05-14 22:50 ` Russell King - ARM Linux
2013-05-14 22:50 ` Russell King - ARM Linux
2013-05-15 1:00 ` Jongsung Kim
2013-05-15 1:00 ` Jongsung Kim
2013-05-15 1:00 ` Jongsung Kim
2013-05-15 4:59 ` Stephen Warren
2013-05-15 4:59 ` Stephen Warren
2013-05-15 9:37 ` Russell King - ARM Linux
2013-05-15 9:37 ` Russell King - ARM Linux
2013-05-16 13:26 ` Jongsung Kim
2013-05-16 13:26 ` Jongsung Kim
2013-05-16 13:26 ` Jongsung Kim
2013-05-21 1:39 ` Jongsung Kim
2013-05-21 1:39 ` Jongsung Kim
2013-05-21 1:39 ` Jongsung Kim
2013-05-21 2:12 ` Stephen Warren
2013-05-21 2:12 ` Stephen Warren
2013-05-21 6:02 ` [PATCH] ARM: bcm2835: override the HW UART periphid Jongsung Kim
2013-05-21 6:02 ` Jongsung Kim
2013-05-21 6:07 ` Jongsung Kim
2013-05-21 6:07 ` Jongsung Kim
2013-05-21 6:07 ` Jongsung Kim
2013-05-21 9:00 ` Gordon Hollingworth
2013-05-21 9:00 ` Gordon Hollingworth
2013-05-21 9:00 ` Gordon Hollingworth
2013-05-21 16:34 ` Stephen Warren
2013-05-21 16:34 ` Stephen Warren
2013-05-22 1:43 ` Stephen Warren
2013-05-22 1:43 ` Stephen Warren
2013-05-22 1:52 ` Jongsung Kim
2013-05-22 1:52 ` Jongsung Kim
2013-05-22 1:52 ` Jongsung Kim
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='01fd01ce5072$d6b9fcd0$842df670$@lge.com' \
--to=neidhard.kim@lge.com \
--cc=gregkh@linuxfoundation.org \
--cc=jslaby@suse.cz \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-rpi-kernel@lists.infradead.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=swarren@wwwdotorg.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.